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spd/ddr4: Double packageBusWidth of dual die package parts to 16

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This fixes an error I made in my previous commit 8a83b86254 (spd/ddr4:
add parts), CB:90032. The package bus width for all the dual die parts
is indeed 16 rather than 8. This has been validated when porting
coreboot to the Lenovo Thinkpad X280 that uses soldered-on DDP RAM
(Samsung K4AAG165WB-MCRC).

Change-Id: I8baa7c979074584e65772315e66e787cef3202e4
Signed-off-by: Johann C. Rode <jcrode@gmx.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90263
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Johann C. Rode 2025-11-28 10:13:10 -08:00 • committed by Matt DeVillier
commit e4a809d441
3 changed files with 8 additions and 8 deletions
Download patch file Download diff file Expand all files Collapse all files

8
spd/ddr4/memory_parts.json
View file

@ -280,7 +280,7 @@
"CL_nRCD_nRP": 15,
"capacityPerDieGb": 8,
"diesPerPackage": 2,
"packageBusWidth": 8,
"packageBusWidth": 16,
"ranksPerPackage": 1
}
},
@ -313,7 +313,7 @@
"CL_nRCD_nRP": 17,
"capacityPerDieGb": 8,
"diesPerPackage": 2,
"packageBusWidth": 8,
"packageBusWidth": 16,
"ranksPerPackage": 1
}
},
@ -346,7 +346,7 @@
"CL_nRCD_nRP": 17,
"capacityPerDieGb": 8,
"diesPerPackage": 2,
"packageBusWidth": 8,
"packageBusWidth": 16,
"ranksPerPackage": 1
}
},
@ -368,7 +368,7 @@
"CL_nRCD_nRP": 17,
"capacityPerDieGb": 8,
"diesPerPackage": 2,
"packageBusWidth": 8,
"packageBusWidth": 16,
"ranksPerPackage": 1
}
},

4
spd/ddr4/set-0/spd-11.hex
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@ -1,11 +1,11 @@
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

4
spd/ddr4/set-0/spd-13.hex
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@ -1,11 +1,11 @@
23 11 0C 03 85 21 91 08 00 00 00 00 01 03 00 00
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