mb/starlabs/adl: Enable TCP0 Display Output

Enable TCP0 alongside TCP1.

Test=build and boot adl/horizon, check there is video output over
USB-C.

Change-Id: I9db17fd3ed3e1eb0f6ea94320b595ce0d51f33e2
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91168
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2026-02-09 20:07:27 +00:00
commit e0121eb463
4 changed files with 14 additions and 3 deletions

View file

@ -38,6 +38,8 @@ chip soc/intel/alderlake
register "device[1].name" = ""DD01""
# [TCP0] Type-C
register "device[2].name" = ""DD02""
register "device[2].use_pld" = "true"
register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(0, 0))"
# [TCP1] Type-C
register "device[3].name" = ""DD03""
register "device[3].use_pld" = "true"
@ -59,6 +61,7 @@ chip soc/intel/alderlake
device ref xhci on
# Left Rear USB 2.0 Type-C 3289 mil
register "usb2_ports[0]" = "USB2_PORT_SHORT(OC_SKIP)"
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
# Left Front USB 3.0 Type C
register "usb2_ports[1]" = "USB2_PORT_SHORT(OC_SKIP)"
@ -78,10 +81,18 @@ chip soc/intel/alderlake
device ref xhci_root_hub on
chip drivers/usb/acpi
register "desc" = ""Left Back USB Type-C""
register "type" = "UPC_TYPE_C_USB2_ONLY"
register "group" = "ACPI_PLD_GROUP(0, 0)"
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(0, 0))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""Left Back USB Type-C""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(0, 0))"
device ref usb3_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""Left Front USB Type-C""

View file

@ -59,6 +59,7 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* HDMI Hot Plug */
PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), /* HDMI Clock */
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), /* HDMI Data */
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* TCP0 Hot Plug */
PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), /* TCP1 Hot Plug */
/* High-Definition Audio */
@ -113,7 +114,6 @@ const struct pad_config gpio_table[] = {
PAD_NC(GPP_A15, NONE),
PAD_NC(GPP_A16, NONE),
PAD_NC(GPP_A17, NONE),
PAD_NC(GPP_A19, NONE),
PAD_NC(GPP_A21, NONE),
PAD_NC(GPP_A22, NONE),
PAD_NC(GPP_A23, NONE),