From e0121eb463e7ca3065634300198d9d5234f281e8 Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Mon, 9 Feb 2026 20:07:27 +0000 Subject: [PATCH] mb/starlabs/adl: Enable TCP0 Display Output Enable TCP0 alongside TCP1. Test=build and boot adl/horizon, check there is video output over USB-C. Change-Id: I9db17fd3ed3e1eb0f6ea94320b595ce0d51f33e2 Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/91168 Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- .../starlabs/adl/variants/hz/data.vbt | Bin 9216 -> 9216 bytes .../adl/variants/hz/data_native_res.vbt | Bin 9216 -> 9216 bytes .../starlabs/adl/variants/hz/devicetree.cb | 15 +++++++++++++-- src/mainboard/starlabs/adl/variants/hz/gpio.c | 2 +- 4 files changed, 14 insertions(+), 3 deletions(-) diff --git a/src/mainboard/starlabs/adl/variants/hz/data.vbt b/src/mainboard/starlabs/adl/variants/hz/data.vbt index a2adefc8b2589fa70efa3937551bf02da294487d..8c22ab4f40c953db62bbe3744709b4430e547cff 100644 GIT binary patch delta 70 zcmZqhXz-XI#cal4FgcM?c%y+hqcRHv2ZI9;D=@GCX$LT^0OT_O`3yil1A_ukt@Pwp P#wMm~37a{YzAFL%l$8uA delta 54 zcmZqhXz-XI#k_>UU~(a&@J0i1MqvjA4h97V2O#EPU|?tfVui_xY}%7s8Jn0G7&db< HeOCkkL30Z} diff --git a/src/mainboard/starlabs/adl/variants/hz/data_native_res.vbt b/src/mainboard/starlabs/adl/variants/hz/data_native_res.vbt index 7e4f64ad7fd3cd3eafeb099eab9154b2b97e3e42..a101af780b8ecc78fff9335c3dc0cab7239b2250 100644 GIT binary patch delta 70 zcmZqhXz-XI#azT-FgcM?c%y+hqcRHv2ZI9;D=@GCX$LT^0OT_O`3yil1A_ukt@Pwp P#wMm~37a{YzAFL%qgf1P delta 54 zcmZqhXz-XI#r%N5U~(a&@J0i1MqvjA4h97V2O#EPU|?tfVui_xY}%7s8Jn0G7&db< HeOCkkOm_=< diff --git a/src/mainboard/starlabs/adl/variants/hz/devicetree.cb b/src/mainboard/starlabs/adl/variants/hz/devicetree.cb index 5a540d75bd..c06ad29b9a 100644 --- a/src/mainboard/starlabs/adl/variants/hz/devicetree.cb +++ b/src/mainboard/starlabs/adl/variants/hz/devicetree.cb @@ -38,6 +38,8 @@ chip soc/intel/alderlake register "device[1].name" = ""DD01"" # [TCP0] Type-C register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(0, 0))" # [TCP1] Type-C register "device[3].name" = ""DD03"" register "device[3].use_pld" = "true" @@ -59,6 +61,7 @@ chip soc/intel/alderlake device ref xhci on # Left Rear USB 2.0 Type-C 3289 mil register "usb2_ports[0]" = "USB2_PORT_SHORT(OC_SKIP)" + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Left Front USB 3.0 Type C register "usb2_ports[1]" = "USB2_PORT_SHORT(OC_SKIP)" @@ -78,10 +81,18 @@ chip soc/intel/alderlake device ref xhci_root_hub on chip drivers/usb/acpi register "desc" = ""Left Back USB Type-C"" - register "type" = "UPC_TYPE_C_USB2_ONLY" - register "group" = "ACPI_PLD_GROUP(0, 0)" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(0, 0))" device ref usb2_port1 on end end + chip drivers/usb/acpi + register "desc" = ""Left Back USB Type-C"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, CENTER, ACPI_PLD_GROUP(0, 0))" + device ref usb3_port2 on end + end chip drivers/usb/acpi register "desc" = ""Left Front USB Type-C"" diff --git a/src/mainboard/starlabs/adl/variants/hz/gpio.c b/src/mainboard/starlabs/adl/variants/hz/gpio.c index a72cc6e157..e214a14cec 100644 --- a/src/mainboard/starlabs/adl/variants/hz/gpio.c +++ b/src/mainboard/starlabs/adl/variants/hz/gpio.c @@ -59,6 +59,7 @@ const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* HDMI Hot Plug */ PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), /* HDMI Clock */ PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), /* HDMI Data */ + PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* TCP0 Hot Plug */ PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), /* TCP1 Hot Plug */ /* High-Definition Audio */ @@ -113,7 +114,6 @@ const struct pad_config gpio_table[] = { PAD_NC(GPP_A15, NONE), PAD_NC(GPP_A16, NONE), PAD_NC(GPP_A17, NONE), - PAD_NC(GPP_A19, NONE), PAD_NC(GPP_A21, NONE), PAD_NC(GPP_A22, NONE), PAD_NC(GPP_A23, NONE),