cpu/x86/smm: add OPAL S3 CBMEM scratch

Provide an optional, coreboot-managed CBMEM scratch buffer for SMM code.

CBMEM is reserved from the OS via the memory map and persists across S3,
so it is suitable for firmware-owned DMA buffers used during resume.
SMRAM is not device DMA-accessible, so this scratch buffer must live
outside SMRAM.

Pass the base/size to SMM via smm_runtime so SMM code can validate
placement and avoid relying on untrusted pointers.

The CBMEM region size is configurable via SMM_OPAL_S3_SCRATCH_SIZE,
defaulting to 16 KiB as a safe value.

TEST=tested with rest of patch train

Change-Id: I79ae5327f27e574b151b7cf456761fa0d7038f2f
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91042
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
This commit is contained in:
Sean Rhodes 2026-02-01 21:11:34 +00:00 committed by Matt DeVillier
commit deb510afeb
5 changed files with 55 additions and 0 deletions

View file

@ -96,6 +96,10 @@ struct smm_runtime {
int smm_log_level;
uintptr_t smmstore_com_buffer_base;
size_t smmstore_com_buffer_size;
#if CONFIG(SMM_OPAL_S3_SCRATCH_CBMEM)
uintptr_t opal_s3_scratch_base;
size_t opal_s3_scratch_size;
#endif
} __packed;
struct smm_module_params {
@ -238,5 +242,8 @@ bool smm_pci_resource_store_fill_resources(struct smm_pci_resource_info *slots,
void smm_pci_resource_store_init(struct smm_runtime *smm_runtime);
void smm_get_smmstore_com_buffer(uintptr_t *base, size_t *size);
#if CONFIG(SMM_OPAL_S3_SCRATCH_CBMEM)
void smm_get_opal_s3_scratch_buffer(uintptr_t *base, size_t *size);
#endif
#endif /* CPU_X86_SMM_H */