Trying to resync with Eric's changes

First, grow heap size in src/arch/i386/config/ldscript.base for DoC
Minor include fixes
Fixes to cua -- but it's now broken, won't find IDE
Minor fix to util/config/NLBConfig.py: for docipl, use CFLAGS

Added files so that CUA works with config tool.
This commit is contained in:
Ronald G. Minnich 2001-03-26 21:49:23 +00:00
commit dd99e41d73
13 changed files with 254 additions and 10 deletions

View file

@ -95,8 +95,8 @@ SECTIONS
.heap (.): {
_heap = .;
/* Reserve 64K for the heap */
. = . + 0x10000;
/* Reserve 256K for the heap */
. = . + 0x40000;
_eheap = .;
}
.stack (.) : {

View file

@ -35,6 +35,7 @@ static char rcsid[] = "$Id$";
#include <cpu/p5/io.h>
#include <intel.h>
#include <pciconf.h>
#include <pci.h>
#include <cpu/p5/cpuid.h>
#include <cpu/p6/ioapic.h>
#include <subr.h>
@ -48,6 +49,11 @@ void intel_main()
void keyboard_on(void);
void framebuffer_on(void);
void intel_copy_irq_routing_table(void);
unsigned long sizeram(void);
void intel_cache_on(unsigned long base, unsigned long totalram);
void intel_zero_irq_settings(void);
void intel_check_irq_routing_table(void);
void intel_interrupts_on();
#ifdef FINAL_MAINBOARD_FIXUP
void final_mainboard_fixup(void);

View file

@ -117,12 +117,12 @@ void error(char errmsg[])
*/
void post_code(uint8_t value)
{
unsigned long hi, lo;
outb(value, 0x80);
#ifdef SERIAL_POST
unsigned long hi, lo;
rdtsc(lo, hi);
printk(KERN_INFO "POST: 0x%02x, TSC Lo: %d, Hi: %d\n",
value, lo, hi);
#endif
outb(value, 0x80);
}

View file

@ -0,0 +1,12 @@
northbridge acer/m1631
southbridge acer/m1535
superio acer/m1535
option ENABLE_FIXED_AND_VARIABLE_MTRRS
option FINAL_MAINBOARD_FIXUP
option HAVE_PIRQ_TABLE
object mainboard.o
object irq_tables.o
keyboard pc80
cpu p5
cpu p6

View file

@ -0,0 +1,31 @@
#include <i386_subr.h>
/* NOTE -- THIS IS A PLACEHOLDER -- WE NEED TO FIX THIS */
#define CHECKSUM 0xe6
const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */
32+16*5, /* there can be total 5 devices on the bus */
0x00, /* Bus 0 */
0x08, /* Device 1, Function 0 */
0x0A20, /* reserve IRQ 11, 9, 5, for PCI */
0x1039, /* Silicon Integrated System */
0x0008, /* SiS 85C503/5513 ISA Bridge */
0x00, /* u8 miniport_data - "crap" */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
CHECKSUM, /* u8 checksum - mod 256 checksum must give zero */
{
/* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
{0x00, 0x58, {{0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}},
0x01, 0x00},
{0x00, 0x60, {{0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}},
0x02, 0x00},
{0x00, 0x01, {{0x61, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}},
0x00, 0x00},
{0x00, 0x10, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}},
0x00, 0x00},
{0x00, 0x0a, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}},
0x00, 0x00},
}
};

View file

@ -5,12 +5,10 @@
void mainboard_fixup()
{
struct pci_dev *pm_pcidev, *host_bridge_pcidev, *nic_pcidev;
unsigned smbus_io, pm_io;
unsigned int i, j;
printk("intel_mainboard_fixup()\n");
printk("intel_mainboard_fixup()\n");
#if 0
struct pci_dev *pm_pcidev, *host_bridge_pcidev, *nic_pcidev;
// put in the right values for acer stuff
pm_pcidev = pci_find_device(0x8086, 0x7113, 0);
nic_pcidev = pci_find_device(0x8086, 0x1229, 0);

View file

@ -0,0 +1 @@
object northbridge.o

View file

@ -1,5 +1,5 @@
#include <pci.h>
#include <printk.h>
// FIX ME!
unsigned long sizeram()
@ -15,8 +15,13 @@ void intel_framebuffer_on()
}
#endif
void
final_northbridge_fixup()
{
printk("SET THAT BIT!\n");
/* set bit 4 of north bridge register d4 to 1 */
}

View file

@ -0,0 +1,2 @@
object southbridge.o

View file

@ -0,0 +1,108 @@
/*
* setup_serial.inc: setup serial port for m1535
*
*
* Copyright 2001 Acer Labs Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
* Reference:
* 1. M1535D document
* $Id$
*/
/*
* Super I/O Logical Device 4 (UART1)
Reg 0x30 [0] = 1 -- UART1 Enable
Reg 0x60 [7:0] = 0x03 -- The high address UART1's I/O base address
Reg 0x61 [7:0] = 0xF8 -- The low address UART1's I/O base address
Reg 0x70 [7:0] = 0x04 -- IRQ[4]
Reg 0xF0 [7:0] = 0x00
Reg 0xf1 [7:0] = 0x00
Reg 0xf2 [7:0] = 0x00
assume I/O port address is 0x3F0
*/
// 1 ;enter configuration mode
movw $0x3f0,%dx
movb $0x51,%al
outb %al,%dx
movw $0x23,%ax
outb %al,%dx
// 2 ;program logical device 4
movw $0x3f0,%dx
movb $0x07,%al
outb %al,%dx //point to device select register
movw $0x3f1,%dx
movb $0x04,%al
outb %al,%dx //point to device 4
movw $0x3f0,%dx
movb $0x30,%al
outb %al,%dx
movw $0x3f1,%dx
movb $0x01,%al
outb %al,%dx //enable UART1 controller
movw $0x3f0,%dx
movb $0x60,%al
outb %al,%dx
movw $0x3f1,%dx
movb $0x03,%al
outb %al,%dx
movw $0x3f0,%dx
movb $0x61,%al
outb %al,%dx
movw $0x3f1,%dx
movb $0xf8,%al
outb %al,%dx //select UART1's I/O base address to $0x3F$0x8
movw $0x3f0,%dx
movb $0x70,%al
outb %al,%dx
movw $0x3f1,%dx
movb $0x04,%al
outb %al,%dx //select IRQ 4 used by UART1
movw $0x3f0,%dx
movb $0xf0,%al
outb %al,%dx
movw $0x3f1,%dx
movb $0x00,%al
outb %al,%dx
movw $0x3f0,%dx
movb $0xf1,%al
outb %al,%dx
movw $0x3f1,%dx
movb $0x00,%al
outb %al,%dx
movw $0x3f0,%dx
movb $0xf2,%al
outb %al,%dx
movw $0x3f1,%dx
movb $0x00,%al
outb %al,%dx
// 3. exit configuration mode
movw $0x3f0,%dx
movb $0xbb,%al
outb %al,%dx

View file

@ -0,0 +1,58 @@
#ifndef lint
static char rcsid[] = "$Id$";
#endif
// just define these here. We may never need them anywhere else
#define PNP_COM1_DEVICE 0x1
#define PNP_COM2_DEVICE 0x2
#include <subr.h>
#include <cpu/p5/io.h>
void
enter_pnp(void)
{
}
void
exit_pnp(void)
{
}
#ifdef MUST_ENABLE_FLOPPY
void
enable_floppy(void)
{
}
#endif /* MUST_ENABLE_FLOPPY */
void
enable_com(int com)
{
}
#ifdef MUST_ENABLE_LPT
void
enable_lpt(void)
{
}
#endif /* MUST_ENABLE_LPT */
void
final_superio_fixup(void)
{
enter_pnp();
#ifdef MUST_ENABLE_FLOPPY
enable_floppy();
#endif /* MUST_ENABLE_LPT */
enable_com(PNP_COM1_DEVICE);
enable_com(PNP_COM2_DEVICE);
#ifdef MUST_ENABLE_LPT
enable_lpt();
#endif /* MUST_ENABLE_LPT */
exit_pnp();
}

View file

@ -254,7 +254,7 @@ def docipl(dir, ipl_name):
iplpath = os.path.join(treetop, 'src', ipl_name)
userrules.append("ipl.o: " + iplpath)
# Now we need a mainboard-specific include path
userrules.append("\tcc $(CPUFLAGS) -I%s -c $<" % mainboard_dir)
userrules.append("\tcc $(CFLAGS) -I%s -c $<" % mainboard_dir)
# now set new values for the ldscript.ld. Should be a script?
rambase = 0x4000
linuxbiosbase = 0x80000

View file

@ -0,0 +1,23 @@
# Sample config file for ASUS CUA with DoC Millennium (as root)
arch i386
# This will make a target directory of ./winfast
target asus_cua
# Asus CUA
mainboard asus/cua
# Enable Serial Console for debugging
option SERIAL_CONSOLE
# Enable MicroCode update and L2 Cache init for PII and PIII
option UPDATE_MICROCODE
option CONFIGURE_L2_CACHE
# Use the internal VGA frame buffer device
# option HAVE_FRAMEBUFFER
# Path to your kernel (vmlinux)
linux /usr/src/linux
# Kernel command line parameters
commandline root=/dev/hda1 console=ttyS0,115200 console=tty0 single