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soc/mediatek/common: Refactor DDP mode setting

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Move common display mode parameter calculation from SoC-specific
mtk_ddp_mode_set functions to a new common mtk_ddp_mode_set function in
src/soc/mediatek/common/display.c.

Rename the SoC-specific mtk_ddp_mode_set functions to
mtk_ddp_soc_mode_set and modify them to directly accept the calculated
display parameters (format, bits per pixel, width, height, and vertical
refresh rate). This centralizes the common logic and improves code
reusability.

TEST=emerge-rauru coreboot -j && emerge-geralt coreboot -j

Change-Id: I2f86dd609f8ea5225ff4d788206c7494164b6e4b
Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com>
Signed-off-by: Yidi Lin <yidilin@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90245
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Yidi Lin 2025-11-27 20:07:53 +08:00 • committed by Matt DeVillier
commit db2ac42405
7 changed files with 39 additions and 105 deletions
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25
src/soc/mediatek/common/display.c
View file

@ -199,3 +199,28 @@ int mtk_display_init(void)
return 0;
}
void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
{
u32 fmt = OVL_INFMT_RGBA8888;
u32 bpp = edid->framebuffer_bits_per_pixel / 8;
u32 width = edid->mode.ha;
u32 height = edid->mode.va;
u32 vrefresh = edid->mode.refresh;
printk(BIOS_DEBUG, "%s: display resolution: %ux%u@%u bpp %u\n", __func__, width, height,
vrefresh, bpp);
if (!vrefresh) {
if (!width || !height)
vrefresh = 60;
else
vrefresh = edid->mode.pixel_clock * 1000 /
((width + edid->mode.hbl) * (height + edid->mode.vbl));
printk(BIOS_WARNING, "%s: vrefresh is not provided; using %u\n", __func__,
vrefresh);
}
mtk_ddp_soc_mode_set(fmt, bpp, width, height, vrefresh, path);
}

2
src/soc/mediatek/common/include/soc/display.h
View file

@ -34,6 +34,8 @@ int mtk_display_init(void);
void mtk_ddp_init(void);
void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path);
void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
enum disp_path_sel path);
void mtk_ddp_ovlsys_start(uintptr_t fb_addr);
#endif

18
src/soc/mediatek/mt8186/ddp.c
View file

@ -141,23 +141,9 @@ void mtk_ddp_init(void)
write32((void *)(SMI_LARB0 + SMI_LARB_PORT_L0_OVL_RDMA0), 0);
}
void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
enum disp_path_sel path)
{
u32 fmt = OVL_INFMT_RGBA8888;
u32 bpp = edid->framebuffer_bits_per_pixel / 8;
u32 width = edid->mode.ha;
u32 height = edid->mode.va;
u32 vrefresh = edid->mode.refresh;
printk(BIOS_INFO, "%s: display resolution: %ux%u@%u bpp %u\n",
__func__, width, height, vrefresh, bpp);
if (!vrefresh) {
vrefresh = 60;
printk(BIOS_INFO, "%s: invalid vrefresh; setting to %u\n",
__func__, vrefresh);
}
main_disp_path_setup(width, height, vrefresh);
rdma_start();
ovl_layer_config(fmt, bpp, width, height);

24
src/soc/mediatek/mt8188/ddp.c
View file

@ -145,29 +145,9 @@ void mtk_ddp_init(void)
write32p(SMI_LARB0 + SMI_LARB_PORT_L0_OVL_RDMA0, 0);
}
void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
enum disp_path_sel path)
{
u32 fmt = OVL_INFMT_RGBA8888;
u32 bpp = edid->framebuffer_bits_per_pixel / 8;
u32 width = edid->mode.ha;
u32 height = edid->mode.va;
u32 vrefresh = edid->mode.refresh;
printk(BIOS_DEBUG, "%s: display resolution: %dx%d@%d bpp %d\n",
__func__, width, height, vrefresh, bpp);
if (!vrefresh) {
if (!width || !height)
vrefresh = 60;
else
vrefresh = edid->mode.pixel_clock * 1000 /
((width + edid->mode.hbl) *
(height + edid->mode.vbl));
printk(BIOS_WARNING, "%s: vrefresh is not provided; using %d\n",
__func__, vrefresh);
}
main_disp_path_setup(width, height, vrefresh, path);
rdma_start();
ovl_layer_config(fmt, bpp, width, height);

25
src/soc/mediatek/mt8189/ddp.c
View file

@ -137,29 +137,10 @@ void mtk_ddp_init(void)
__func__, read32(&smi_larb0->port_l0_ovl_rdma[0]));
}
void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
enum disp_path_sel path)
{
u32 fmt = OVL_INFMT_RGBA8888;
u32 bpp = edid->framebuffer_bits_per_pixel / 8;
u32 width = edid->mode.ha;
u32 height = edid->mode.va;
u32 vrefresh_hz = edid->mode.refresh;
printk(BIOS_INFO, "%s: display resolution: %dx%d@%d bpp %d\n",
__func__, width, height, vrefresh_hz, bpp);
if (!vrefresh_hz) {
if (!width || !height)
vrefresh_hz = 60;
else
vrefresh_hz = edid->mode.pixel_clock * 1000 /
((width + edid->mode.hbl) * (height + edid->mode.vbl));
printk(BIOS_WARNING, "%s: vrefresh is not provided; using %d\n",
__func__, vrefresh_hz);
}
main_disp_path_setup(width, height, vrefresh_hz, path);
main_disp_path_setup(width, height, vrefresh, path);
rdma_start();
ovl_layer_config(fmt, bpp, width, height);
}

24
src/soc/mediatek/mt8195/ddp.c
View file

@ -150,29 +150,9 @@ void mtk_ddp_init(void)
write32((void *)(SMI_LARB0 + SMI_LARB_PORT_L0_OVL_RDMA0), 0);
}
void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
enum disp_path_sel path)
{
u32 fmt = OVL_INFMT_RGBA8888;
u32 bpp = edid->framebuffer_bits_per_pixel / 8;
u32 width = edid->mode.ha;
u32 height = edid->mode.va;
u32 vrefresh = edid->mode.refresh;
printk(BIOS_DEBUG, "%s: display resolution: %dx%d@%d bpp %d\n",
__func__, width, height, vrefresh, bpp);
if (!vrefresh) {
if (!width || !height)
vrefresh = 60;
else
vrefresh = edid->mode.pixel_clock * 1000 /
((width + edid->mode.hbl) *
(height + edid->mode.vbl));
printk(BIOS_WARNING, "%s: vrefresh is not provided; using %d\n",
__func__, vrefresh);
}
main_disp_path_setup(width, height, vrefresh);
rdma_start();
ovl_layer_config(fmt, bpp, width, height);

24
src/soc/mediatek/mt8196/ddp.c
View file

@ -428,32 +428,12 @@ void mtk_ddp_init(void)
disp_clock_on();
}
void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
enum disp_path_sel path)
{
u32 fmt = OVL_INFMT_RGBA8888;
u32 bpp = edid->framebuffer_bits_per_pixel / 8;
u32 width = edid->mode.ha;
u32 height = edid->mode.va;
u32 vrefresh = edid->mode.refresh;
printk(BIOS_DEBUG, "%s: display resolution: %ux%u@%u bpp %u\n", __func__, width, height,
vrefresh, bpp);
if (!vrefresh) {
if (!width || !height)
vrefresh = 60;
else
vrefresh = edid->mode.pixel_clock * 1000 /
((width + edid->mode.hbl) * (height + edid->mode.vbl));
printk(BIOS_WARNING, "%s: vrefresh is not provided; using %u\n", __func__,
vrefresh);
}
if (width > 0x1FFF || height > 0x1FFF)
printk(BIOS_WARNING, "%s: w/h: %d/%d exceed hw limit %u\n", __func__,
width, height, 0x1FFF);
main_disp_path_setup(width, height, vrefresh, path);
ovlsys_layer_config(fmt, bpp, width, height, path);
}