diff --git a/src/soc/mediatek/common/display.c b/src/soc/mediatek/common/display.c
index f48cdaf215..297fcc2fe8 100644
--- a/src/soc/mediatek/common/display.c
+++ b/src/soc/mediatek/common/display.c
@@ -199,3 +199,28 @@ int mtk_display_init(void)
 
 	return 0;
 }
+
+void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
+{
+	u32 fmt = OVL_INFMT_RGBA8888;
+	u32 bpp = edid->framebuffer_bits_per_pixel / 8;
+	u32 width = edid->mode.ha;
+	u32 height = edid->mode.va;
+	u32 vrefresh = edid->mode.refresh;
+
+	printk(BIOS_DEBUG, "%s: display resolution: %ux%u@%u bpp %u\n", __func__, width, height,
+	       vrefresh, bpp);
+
+	if (!vrefresh) {
+		if (!width || !height)
+			vrefresh = 60;
+		else
+			vrefresh = edid->mode.pixel_clock * 1000 /
+				   ((width + edid->mode.hbl) * (height + edid->mode.vbl));
+
+		printk(BIOS_WARNING, "%s: vrefresh is not provided; using %u\n", __func__,
+		       vrefresh);
+	}
+
+	mtk_ddp_soc_mode_set(fmt, bpp, width, height, vrefresh, path);
+}
diff --git a/src/soc/mediatek/common/include/soc/display.h b/src/soc/mediatek/common/include/soc/display.h
index f202c1d40e..2551e0b5e5 100644
--- a/src/soc/mediatek/common/include/soc/display.h
+++ b/src/soc/mediatek/common/include/soc/display.h
@@ -34,6 +34,8 @@ int mtk_display_init(void);
 
 void mtk_ddp_init(void);
 void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path);
+void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
+			  enum disp_path_sel path);
 void mtk_ddp_ovlsys_start(uintptr_t fb_addr);
 
 #endif
diff --git a/src/soc/mediatek/mt8186/ddp.c b/src/soc/mediatek/mt8186/ddp.c
index 5a5f5447ff..84593481b4 100644
--- a/src/soc/mediatek/mt8186/ddp.c
+++ b/src/soc/mediatek/mt8186/ddp.c
@@ -141,23 +141,9 @@ void mtk_ddp_init(void)
 	write32((void *)(SMI_LARB0 + SMI_LARB_PORT_L0_OVL_RDMA0), 0);
 }
 
-void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
+void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
+			  enum disp_path_sel path)
 {
-	u32 fmt = OVL_INFMT_RGBA8888;
-	u32 bpp = edid->framebuffer_bits_per_pixel / 8;
-	u32 width = edid->mode.ha;
-	u32 height = edid->mode.va;
-	u32 vrefresh = edid->mode.refresh;
-
-	printk(BIOS_INFO, "%s: display resolution: %ux%u@%u bpp %u\n",
-	       __func__, width, height, vrefresh, bpp);
-
-	if (!vrefresh) {
-		vrefresh = 60;
-		printk(BIOS_INFO, "%s: invalid vrefresh; setting to %u\n",
-		       __func__, vrefresh);
-	}
-
 	main_disp_path_setup(width, height, vrefresh);
 	rdma_start();
 	ovl_layer_config(fmt, bpp, width, height);
diff --git a/src/soc/mediatek/mt8188/ddp.c b/src/soc/mediatek/mt8188/ddp.c
index ce14fa7800..e37915e35c 100644
--- a/src/soc/mediatek/mt8188/ddp.c
+++ b/src/soc/mediatek/mt8188/ddp.c
@@ -145,29 +145,9 @@ void mtk_ddp_init(void)
 	write32p(SMI_LARB0 + SMI_LARB_PORT_L0_OVL_RDMA0, 0);
 }
 
-void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
+void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
+			  enum disp_path_sel path)
 {
-	u32 fmt = OVL_INFMT_RGBA8888;
-	u32 bpp = edid->framebuffer_bits_per_pixel / 8;
-	u32 width = edid->mode.ha;
-	u32 height = edid->mode.va;
-	u32 vrefresh = edid->mode.refresh;
-
-	printk(BIOS_DEBUG, "%s: display resolution: %dx%d@%d bpp %d\n",
-	       __func__, width, height, vrefresh, bpp);
-
-	if (!vrefresh) {
-		if (!width || !height)
-			vrefresh = 60;
-		else
-			vrefresh = edid->mode.pixel_clock * 1000 /
-				   ((width + edid->mode.hbl) *
-				    (height + edid->mode.vbl));
-
-		printk(BIOS_WARNING, "%s: vrefresh is not provided; using %d\n",
-		       __func__, vrefresh);
-	}
-
 	main_disp_path_setup(width, height, vrefresh, path);
 	rdma_start();
 	ovl_layer_config(fmt, bpp, width, height);
diff --git a/src/soc/mediatek/mt8189/ddp.c b/src/soc/mediatek/mt8189/ddp.c
index 1d5630736c..0fc82d8a27 100644
--- a/src/soc/mediatek/mt8189/ddp.c
+++ b/src/soc/mediatek/mt8189/ddp.c
@@ -137,29 +137,10 @@ void mtk_ddp_init(void)
 	       __func__, read32(&smi_larb0->port_l0_ovl_rdma[0]));
 }
 
-void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
+void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
+			  enum disp_path_sel path)
 {
-	u32 fmt = OVL_INFMT_RGBA8888;
-	u32 bpp = edid->framebuffer_bits_per_pixel / 8;
-	u32 width = edid->mode.ha;
-	u32 height = edid->mode.va;
-	u32 vrefresh_hz = edid->mode.refresh;
-
-	printk(BIOS_INFO, "%s: display resolution: %dx%d@%d bpp %d\n",
-	       __func__, width, height, vrefresh_hz, bpp);
-
-	if (!vrefresh_hz) {
-		if (!width || !height)
-			vrefresh_hz = 60;
-		else
-			vrefresh_hz = edid->mode.pixel_clock * 1000 /
-				   ((width + edid->mode.hbl) * (height + edid->mode.vbl));
-
-		printk(BIOS_WARNING, "%s: vrefresh is not provided; using %d\n",
-		       __func__, vrefresh_hz);
-	}
-
-	main_disp_path_setup(width, height, vrefresh_hz, path);
+	main_disp_path_setup(width, height, vrefresh, path);
 	rdma_start();
 	ovl_layer_config(fmt, bpp, width, height);
 }
diff --git a/src/soc/mediatek/mt8195/ddp.c b/src/soc/mediatek/mt8195/ddp.c
index 2bd95a2fac..875b3103e5 100644
--- a/src/soc/mediatek/mt8195/ddp.c
+++ b/src/soc/mediatek/mt8195/ddp.c
@@ -150,29 +150,9 @@ void mtk_ddp_init(void)
 	write32((void *)(SMI_LARB0 + SMI_LARB_PORT_L0_OVL_RDMA0), 0);
 }
 
-void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
+void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
+			  enum disp_path_sel path)
 {
-	u32 fmt = OVL_INFMT_RGBA8888;
-	u32 bpp = edid->framebuffer_bits_per_pixel / 8;
-	u32 width = edid->mode.ha;
-	u32 height = edid->mode.va;
-	u32 vrefresh = edid->mode.refresh;
-
-	printk(BIOS_DEBUG, "%s: display resolution: %dx%d@%d bpp %d\n",
-	       __func__, width, height, vrefresh, bpp);
-
-	if (!vrefresh) {
-		if (!width || !height)
-			vrefresh = 60;
-		else
-			vrefresh = edid->mode.pixel_clock * 1000 /
-				   ((width + edid->mode.hbl) *
-				    (height + edid->mode.vbl));
-
-		printk(BIOS_WARNING, "%s: vrefresh is not provided; using %d\n",
-		       __func__, vrefresh);
-	}
-
 	main_disp_path_setup(width, height, vrefresh);
 	rdma_start();
 	ovl_layer_config(fmt, bpp, width, height);
diff --git a/src/soc/mediatek/mt8196/ddp.c b/src/soc/mediatek/mt8196/ddp.c
index 6e63b376cd..cd7a50bd8b 100644
--- a/src/soc/mediatek/mt8196/ddp.c
+++ b/src/soc/mediatek/mt8196/ddp.c
@@ -428,32 +428,12 @@ void mtk_ddp_init(void)
 	disp_clock_on();
 }
 
-void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
+void mtk_ddp_soc_mode_set(u32 fmt, u32 bpp, u32 width, u32 height, u32 vrefresh,
+			  enum disp_path_sel path)
 {
-	u32 fmt = OVL_INFMT_RGBA8888;
-	u32 bpp = edid->framebuffer_bits_per_pixel / 8;
-	u32 width = edid->mode.ha;
-	u32 height = edid->mode.va;
-	u32 vrefresh = edid->mode.refresh;
-
-	printk(BIOS_DEBUG, "%s: display resolution: %ux%u@%u bpp %u\n", __func__, width, height,
-	       vrefresh, bpp);
-
-	if (!vrefresh) {
-		if (!width || !height)
-			vrefresh = 60;
-		else
-			vrefresh = edid->mode.pixel_clock * 1000 /
-				   ((width + edid->mode.hbl) * (height + edid->mode.vbl));
-
-		printk(BIOS_WARNING, "%s: vrefresh is not provided; using %u\n", __func__,
-		       vrefresh);
-	}
-
 	if (width > 0x1FFF || height > 0x1FFF)
 		printk(BIOS_WARNING, "%s: w/h: %d/%d exceed hw limit %u\n", __func__,
 		       width, height, 0x1FFF);
-
 	main_disp_path_setup(width, height, vrefresh, path);
 	ovlsys_layer_config(fmt, bpp, width, height, path);
 }