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tegra124: Fix SPI base addresses

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This updates the APB addresses for the SPI controller and gets rid of
the obsolete SLINK nomenclature.

BUG=none
BRANCH=none
TEST=tested in upcoming Tegra124 SPI driver patches
Signed-off-by: David Hendricks <dhendrix@chromium.org>

Change-Id: I6e7507518eb0531af8bf7865d6e31a8c22283c3d
Reviewed-on: https://chromium-review.googlesource.com/173322
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Ronald Minnich <rminnich@chromium.org>
Commit-Queue: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
David Hendricks 2013-10-08 20:54:03 -07:00 • committed by chrome-internal-fetch
commit da808e4691
1 changed files with 6 additions and 6 deletions
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12
src/soc/nvidia/tegra124/include/soc/addressmap.h
View file

@ -51,12 +51,12 @@ enum {
TEGRA_I2C4_BASE = TEGRA_APB_MISC_BASE + 0xC700,
TEGRA_I2C5_BASE = TEGRA_APB_MISC_BASE + 0xD000,
TEGRA_I2C6_BASE = TEGRA_APB_MISC_BASE + 0xD100,
TEGRA_SLINK1_BASE = TEGRA_APB_MISC_BASE + 0xD400,
TEGRA_SLINK2_BASE = TEGRA_APB_MISC_BASE + 0xD600,
TEGRA_SLINK3_BASE = TEGRA_APB_MISC_BASE + 0xD800,
TEGRA_SLINK4_BASE = TEGRA_APB_MISC_BASE + 0xDA00,
TEGRA_SLINK5_BASE = TEGRA_APB_MISC_BASE + 0xDC00,
TEGRA_SLINK6_BASE = TEGRA_APB_MISC_BASE + 0xDE00,
TEGRA_SPI1_BASE = TEGRA_APB_MISC_BASE + 0xD400,
TEGRA_SPI2_BASE = TEGRA_APB_MISC_BASE + 0xD600,
TEGRA_SPI3_BASE = TEGRA_APB_MISC_BASE + 0xD800,
TEGRA_SPI4_BASE = TEGRA_APB_MISC_BASE + 0xDA00,
TEGRA_SPI5_BASE = TEGRA_APB_MISC_BASE + 0xDC00,
TEGRA_SPI6_BASE = TEGRA_APB_MISC_BASE + 0xDE00,
TEGRA_DVC_BASE = TEGRA_APB_MISC_BASE + 0xD000,
TEGRA_PMC_BASE = TEGRA_APB_MISC_BASE + 0xE400,
TEGRA_EMC_BASE = TEGRA_APB_MISC_BASE + 0xF400,