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Initialize mmc1 interface GPIOs properly

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The currently used Bay Trail devices comply with eMMC 4.51
specification and as such require the appropriate GPIOs to be
configured for func3.

Note that the CMD line termination requires 2K, otherwise when driven
by the eMMC device the front slope of the pulse in unacceptably
gentle.

BUG=chrome-os-partner:22580
TEST=manual
  . with u-boot SDHCI driver implemented, the eMMC device on the
    Bayley Bay CRB can be initialized and mounted

Change-Id: Ib53b6e42d8558c9ca2dff4b6bbf3bcf6fd22e136
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173241
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
This commit is contained in:
Vadim Bendebury 2013-10-16 10:17:41 -07:00 • committed by chrome-internal-fetch
commit ebe816cafb
1 changed files with 11 additions and 11 deletions
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22
src/mainboard/intel/bayleybay/gpio.c
View file

@ -70,17 +70,17 @@ static const struct soc_gpio_map gpscore_gpio_map[] = {
GPIO_DEFAULT, /* GPIO 13 */
GPIO_DEFAULT, /* GPIO 14 */
GPIO_DEFAULT, /* GPIO 15 */
GPIO_DEFAULT, /* GPIO 16 */
GPIO_DEFAULT, /* GPIO 17 */
GPIO_DEFAULT, /* GPIO 18 */
GPIO_DEFAULT, /* GPIO 19 */
GPIO_DEFAULT, /* GPIO 20 */
GPIO_DEFAULT, /* GPIO 21 */
GPIO_DEFAULT, /* GPIO 22 */
GPIO_DEFAULT, /* GPIO 23 */
GPIO_DEFAULT, /* GPIO 24 */
GPIO_DEFAULT, /* GPIO 25 */
GPIO_DEFAULT, /* GPIO 26 */
GPIO_FUNC3_PD_10K, /* GPIO 16 MMC1_45_CLK */
GPIO_FUNC3_PU_10K, /* GPIO 17 MMC1_45_D[0] */
GPIO_FUNC3_PU_10K, /* GPIO 18 MMC1_45_D[1] */
GPIO_FUNC3_PU_10K, /* GPIO 19 MMC1_45_D[2] */
GPIO_FUNC3_PU_10K, /* GPIO 20 MMC1_45_D[3] */
GPIO_FUNC3_PU_10K, /* GPIO 21 MMC1_45_D[4] */
GPIO_FUNC3_PU_10K, /* GPIO 22 MMC1_45_D[5] */
GPIO_FUNC3_PU_10K, /* GPIO 23 MMC1_45_D[6] */
GPIO_FUNC3_PU_10K, /* GPIO 24 MMC1_45_D[7] */
_GPIO_FUNC(3, UP, 2K), /* GPIO 25 MMC1_45_CMD */
GPIO_FUNC3_PU_10K, /* GPIO 26 MMC1_45_RST */
GPIO_DEFAULT, /* GPIO 27 */
GPIO_DEFAULT, /* GPIO 28 */
GPIO_DEFAULT, /* GPIO 29 */