mb/hp/snb_ivb_desktops/variants: enable 4th sata port on tested models
Recent development of the "pro_6300" variant fixed the 4th sata port,
using "register sata_port_map" = "0x17" in "overridetree.cb" the same
is valid for the following 2 variants:
- compaq_8300_elite_sff
- compaq_8200_elite_sff
BUG=581#note-22
TEST=grub2 output & dmesg output
p4
�����������������������������������������
� Boot Menu �
�����������������������������������������
Device Path :
Select a Boot Device PciRoot(0x0)/Pci(0x1F,
0x2)/Sata(0x4,0xFFFF,0
UEFI Shell x0)
USB Device
SATA: hp DVD A DH16ABSH
dmesg | grep SATA | grep link
[ 4.994271] ata1: SATA link down (SStatus 0 SControl 300)
[ 5.304068] ata2: SATA link down (SStatus 0 SControl 300)
[ 5.616102] ata3: SATA link down (SStatus 0 SControl 300)
[ 5.920122] ata5: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
Change-Id: Idcef5854e1e97380bec12374411ddfdb50395c29
Signed-off-by: Walter Sonius <walterav1984@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88304
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
95784dbafb
commit
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2 changed files with 2 additions and 2 deletions
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@ -5,7 +5,7 @@ chip northbridge/intel/sandybridge
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subsystemid 0x103c 0x1495 inherit
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chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
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register "sata_port_map" = "0xf"
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register "sata_port_map" = "0x17"
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register "spi_uvscc" = "0x0"
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register "usb_port_config" = "{
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{ 1, 0, -1 },
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@ -5,7 +5,7 @@ chip northbridge/intel/sandybridge
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subsystemid 0x103c 0x3397 inherit
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chip southbridge/intel/bd82x6x
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register "sata_port_map" = "0xf"
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register "sata_port_map" = "0x17"
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register "superspeed_capable_ports" = "0x0000000f"
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register "xhci_switchable_ports" = "0x0000000f"
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register "usb_port_config" = "{
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