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commonlib: Refactor CSE sync eventLog

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This patch enhances the readability of the CSE sync event
ELOG_TYPE_FW_CSE_SYNC by updating the event naming from "early and late
bootstage" to "pre and post memory."

BUG=b:379585294
TEST=boot verified on google/rex0 and google/rex64
without change:
```
rex-rev3 ~ # elogtool list
rex64-rev3 ~ # /media/usb/elogtool list
3 | 2024-01-01 22:25:59-0800 | Firmware CSE sync | Late CSE Sync
```
with change:
```
rex64-rev3 ~ # elogtool list
3 | 2024-12-17 02:22:36-0800 | Firmware CSE sync | Post RAM CSE Sync
```

Change-Id: Ia5db3ffb43b2ceac821de72ef9e88ed62e617d41
Signed-off-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85622
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Dinesh Gehlot 2024-12-17 17:03:56 +05:30 • committed by Subrata Banik
commit d90b1322ab
3 changed files with 6 additions and 6 deletions
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4
src/commonlib/bsd/include/commonlib/bsd/elog.h
View file

@ -385,8 +385,8 @@ struct elog_event_extended_event {
* Events related to CSE sync
*/
#define ELOG_TYPE_FW_CSE_SYNC 0xbd
#define ELOG_FW_EARLY_CSE_SYNC 0x0
#define ELOG_FW_LATE_CSE_SYNC 0x1
#define ELOG_FW_PRE_RAM_CSE_SYNC 0x0
#define ELOG_FW_POST_RAM_CSE_SYNC 0x1
#define ELOG_FW_CSE_SYNC_AT_PAYLOAD 0x2
/* Only the 7-LSB are used for size */