soc/intel/xeon_sp: Fix VTD address
On 1st and 2nd gen Xeon-SP the VTD PCI device is not at DEVFN 0.0. Fix the DEVFN address and thus fix an assertion in vtd_probe_bar_size(). Change-Id: Ie879e95436af92fca1fee49135938ca2b005d579 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85136 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shuo Liu <shuo.liu@intel.com>
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2 changed files with 12 additions and 3 deletions
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@ -28,6 +28,7 @@ static const STACK_RES *domain_to_stack_res(const struct device *dev)
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static void iio_pci_domain_read_resources(struct device *dev)
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{
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const STACK_RES *sr = domain_to_stack_res(dev);
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struct device *vtd_dev;
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if (!sr)
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return;
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@ -56,7 +57,10 @@ static void iio_pci_domain_read_resources(struct device *dev)
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sr->PciResourceMem64Base, sr->PciResourceMem64Limit + 1);
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/* Declare domain reserved MMIO */
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uint64_t reserved_mmio = sr->VtdBarAddress + vtd_probe_bar_size(pcidev_on_root(0, 0));
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vtd_dev = pcidev_on_root(VTD_DEV_NUM, VTD_FUNC_NUM);
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assert(vtd_dev);
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uint64_t reserved_mmio = sr->VtdBarAddress + vtd_probe_bar_size(vtd_dev);
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if ((reserved_mmio >= sr->PciResourceMem32Base) &&
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(reserved_mmio <= sr->PciResourceMem32Limit))
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mmio_range(dev, index++, reserved_mmio,
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@ -10,8 +10,8 @@
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#include <intelblocks/acpi.h>
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#include <intelblocks/vtd.h>
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#include <soc/acpi.h>
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#include <soc/pci_devs.h>
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#include <IioPcieConfigUpd.h>
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#include <soc/chip_common.h>
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/*
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@ -79,6 +79,8 @@ void create_ioat_domains(const union xeon_domain_path path,
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const STACK_RES *const sr,
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const size_t pci_segment_group)
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{
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struct device *vtd_dev;
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if (sr->BusLimit < sr->BusBase + HQM_BUS_OFFSET + HQM_RESERVED_BUS) {
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printk(BIOS_WARNING,
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"Ignoring IOAT domain with limited bus range.\n");
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@ -143,7 +145,10 @@ void create_ioat_domains(const union xeon_domain_path path,
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&index);
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/* Declare domain reserved MMIO */
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uint64_t reserved_mmio = sr->VtdBarAddress + vtd_probe_bar_size(pcidev_on_root(0, 0));
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vtd_dev = pcidev_on_root(VTD_DEV_NUM, VTD_FUNC_NUM);
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assert(vtd_dev);
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uint64_t reserved_mmio = sr->VtdBarAddress + vtd_probe_bar_size(vtd_dev);
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if ((reserved_mmio >= sr->PciResourceMem32Base) &&
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(reserved_mmio <= sr->PciResourceMem32Limit))
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mmio_range(dev, index, reserved_mmio,
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