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mb/google/trulo/var/pujjocento: Configure tcss_aux_ori

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Resolve the issue that DP can only display on one side.

BUG=b:416842915
BRANCH=none
TEST=Build and boot to pujjocento. Verify typec works.

Change-Id: I55f2f28a0bdb052cafa05a98f51c8483fb343b8c
Signed-off-by: Kun Liu <liukun11@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87757
Reviewed-by: Derek Huang <derekhuang@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kun Liu 2025-05-20 15:52:05 +08:00 • committed by Subrata Banik
commit d281a3c559
1 changed files with 10 additions and 0 deletions
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10
src/mainboard/google/brya/variants/pujjocento/overridetree.cb
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@ -49,6 +49,16 @@ chip soc/intel/alderlake
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 WWAN(LTE)
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
# SOC Aux orientation override:
# This is a bitfield that corresponds to up to 4 TCSS ports.
# Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
# TcssAuxOri = 0101b
# Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
# Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
# motherboard to USBC connector
register "tcss_aux_ori" = "0"
# HD Audio