UPSTREAM: nb/intel/x4x/raminit: Remove very long delay

It is not really known why there is such a long delay, but it works
fine without it.

TESTED on ga-g41m-es2l.

BUG=none
BRANCH=none
TEST=none

Change-Id: I7401ed84900a513ba2240e0c3b823aa46b5f7ec2
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: e729366d7a
Original-Change-Id: Idff5b978bbf161f8520d8000848e7b11c98c3945
Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-on: https://review.coreboot.org/19514
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/510763
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This commit is contained in:
Arthur Heymans 2017-05-01 18:36:59 +02:00 committed by chrome-bot
commit d17d52a795

View file

@ -1923,8 +1923,6 @@ void raminit_ddr2(struct sysinfo *s)
die("Error: DDR is faster than FSB, halt\n");
}
mdelay(250);
// Program clock crossing
clkcross_ddr2(s);
printk(BIOS_DEBUG, "Done clk crossing\n");