From d17d52a795560fc32ed4f84344c12d2c7a6fbaee Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 1 May 2017 18:36:59 +0200 Subject: [PATCH] UPSTREAM: nb/intel/x4x/raminit: Remove very long delay It is not really known why there is such a long delay, but it works fine without it. TESTED on ga-g41m-es2l. BUG=none BRANCH=none TEST=none Change-Id: I7401ed84900a513ba2240e0c3b823aa46b5f7ec2 Signed-off-by: Patrick Georgi Original-Commit-Id: e729366d7a5246eeae6a9b0bb30271fc92ac5136 Original-Change-Id: Idff5b978bbf161f8520d8000848e7b11c98c3945 Original-Signed-off-by: Arthur Heymans Original-Reviewed-on: https://review.coreboot.org/19514 Original-Reviewed-by: Philippe Mathieu-Daud Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth Reviewed-on: https://chromium-review.googlesource.com/510763 Commit-Ready: Patrick Georgi Tested-by: Patrick Georgi Reviewed-by: Patrick Georgi --- src/northbridge/intel/x4x/raminit_ddr2.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c index 35caaa6b73..2178e24505 100644 --- a/src/northbridge/intel/x4x/raminit_ddr2.c +++ b/src/northbridge/intel/x4x/raminit_ddr2.c @@ -1923,8 +1923,6 @@ void raminit_ddr2(struct sysinfo *s) die("Error: DDR is faster than FSB, halt\n"); } - mdelay(250); - // Program clock crossing clkcross_ddr2(s); printk(BIOS_DEBUG, "Done clk crossing\n");