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Fix small bug in raminit for 440gx. If you have ecc ram you need to set

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0x18 into reg 0x50.w

More helpful error messages when elfboot fails.
This commit is contained in:
Ronald G. Minnich 2001-09-20 17:31:08 +00:00
commit cffb97e763
2 changed files with 27 additions and 0 deletions
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6
src/lib/elfboot.c
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@ -42,6 +42,12 @@ static int safe_range(unsigned long start, unsigned long len)
for(i = 0; i < sizeof(bad_ranges)/sizeof(bad_ranges[0]); i++) {
if ((start < bad_ranges[i].end) &&
(end > bad_ranges[i].start)) {
printk_err(__FUNCTION__ " start 0x%x end 0x%x\n",
start, end);
printk_err(__FUNCTION__ " Conflicts with range %d\n",
i);
printk_err(" which starts at 0x%x ends at 0x%x\n",
bad_ranges[i].start, bad_ranges[i].end);
return 0;
}
}

21
src/northbridge/intel/440gx/raminit.inc
View file

@ -944,6 +944,27 @@ spd_set_nbxcfg:
movl %esi, %edx
movl $0x53, %eax
PCI_WRITE_CONFIG_BYTE
/* Now see if esi is 0xff. If it is we are done. If not,
* we need to set 0x18 into register 0x50.l
* we will do this in two steps, first or in 0x80 to 0x50.b,
* then or in 0x1 to 0x51.b
*/
mov %esi, %eax
cmpb $0xff, %al
je 1f
movl $0x50, %eax
PCI_READ_CONFIG_BYTE
orb $0x80, %al
movb %al, %dl
movl $0x50, %eax
PCI_WRITE_CONFIG_BYTE
movl $0x51, %eax
PCI_READ_CONFIG_BYTE
orb $0x1, %al
movb %al, %dl
movl $0x51, %eax
PCI_WRITE_CONFIG_BYTE
1:
RET_LABEL(spd_set_nbxcfg)