From cffb97e76384e615f6b596e56535d2a35f879c6a Mon Sep 17 00:00:00 2001
From: "Ronald G. Minnich" <rminnich@gmail.com>
Date: Thu, 20 Sep 2001 17:31:08 +0000
Subject: [PATCH] Fix small bug in raminit for 440gx. If you have ecc ram you
 need to set 0x18 into reg 0x50.w

More helpful error messages when elfboot fails.
---
 src/lib/elfboot.c                       |  6 ++++++
 src/northbridge/intel/440gx/raminit.inc | 21 +++++++++++++++++++++
 2 files changed, 27 insertions(+)

diff --git a/src/lib/elfboot.c b/src/lib/elfboot.c
index a0cb544be4..77940cb712 100644
--- a/src/lib/elfboot.c
+++ b/src/lib/elfboot.c
@@ -42,6 +42,12 @@ static int safe_range(unsigned long start, unsigned long len)
 	for(i = 0; i < sizeof(bad_ranges)/sizeof(bad_ranges[0]); i++) {
 		if ((start < bad_ranges[i].end) &&
 			(end > bad_ranges[i].start)) {
+			printk_err(__FUNCTION__ " start 0x%x end 0x%x\n", 
+					start, end);
+			printk_err(__FUNCTION__ " Conflicts with range %d\n",
+				i);
+			printk_err("  which starts at 0x%x ends at 0x%x\n", 
+				bad_ranges[i].start, bad_ranges[i].end);	
 			return 0;
 		}
 	}
diff --git a/src/northbridge/intel/440gx/raminit.inc b/src/northbridge/intel/440gx/raminit.inc
index 26897f8c20..ba9d953299 100644
--- a/src/northbridge/intel/440gx/raminit.inc
+++ b/src/northbridge/intel/440gx/raminit.inc
@@ -944,6 +944,27 @@ spd_set_nbxcfg:
 	movl %esi, %edx
 	movl $0x53, %eax
 	PCI_WRITE_CONFIG_BYTE
+	/* Now see if esi is 0xff. If it is we are done. If not, 
+	 * we need to set 0x18 into register 0x50.l
+	 * we will do this in two steps, first or in 0x80 to 0x50.b, 
+	 * then or in 0x1 to 0x51.b
+         */
+	mov	%esi, %eax
+	cmpb	$0xff, %al
+	je	1f
+	movl	$0x50, %eax
+	PCI_READ_CONFIG_BYTE
+	orb	$0x80, %al
+	movb	%al, %dl
+	movl	$0x50, %eax
+	PCI_WRITE_CONFIG_BYTE
+	movl	$0x51, %eax
+	PCI_READ_CONFIG_BYTE
+	orb	$0x1, %al
+	movb	%al, %dl
+	movl	$0x51, %eax
+	PCI_WRITE_CONFIG_BYTE
+1:	
 	RET_LABEL(spd_set_nbxcfg)