mb/starlabs/*: Correct the enable GPIO for WLAN

These are configured incorrectly, to use the WLAN WAKE GPIOs
as enable GPIOS. Correct these to use WIFI RF KILL, and disconnect
the now unused WLAN WAKE GPIOs.

Change-Id: I12797875acacc231e155ab4e427a950a3b1b9703
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86184
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Sean Rhodes 2025-01-28 13:54:16 +00:00
commit cefef5ce99
10 changed files with 10 additions and 10 deletions

View file

@ -223,7 +223,7 @@ const struct pad_config gpio_table[] = {
/* D12: GSPI 2 MOSI FPS */
PAD_NC(GPP_D12, NONE),
/* D13: Wireless LAN Wake */
PAD_CFG_GPO(GPP_D13, 1, PLTRST),
PAD_NC(GPP_D13, NONE),
/* D14: Test Point 10 */
PAD_NC(GPP_D14, NONE),
/* D15: Not Connected */

View file

@ -162,7 +162,7 @@ chip soc/intel/alderlake
"M.2/M 2230"
"SlotDataBusWidth1X"
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D13)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H2)"
register "srcclk_pin" = "2"
register "add_acpi_dma_property" = "true"

View file

@ -222,7 +222,7 @@ const struct pad_config gpio_table[] = {
/* D12: GSPI 2 MOSI FPS */
PAD_NC(GPP_D12, NONE),
/* D13: Wireless LAN Wake */
PAD_CFG_GPO(GPP_D13, 1, PLTRST),
PAD_NC(GPP_D13, NONE),
/* D14: CPU M.2 SSD Power Enable */
PAD_NC(GPP_D14, NONE),
/* D15: Not Connected */

View file

@ -170,7 +170,7 @@ chip soc/intel/alderlake
"M.2/M 2230"
"SlotDataBusWidth1X"
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D13)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H2)"
register "srcclk_pin" = "1"
register "add_acpi_dma_property" = "true"

View file

@ -222,7 +222,7 @@ const struct pad_config gpio_table[] = {
/* D12: GSPI 2 MOSI FPS */
PAD_NC(GPP_D12, NONE),
/* D13: Wireless LAN Wake */
PAD_CFG_GPO(GPP_D13, 1, PLTRST),
PAD_NC(GPP_D13, NONE),
/* D14: CPU M.2 SSD Power Enable */
PAD_NC(GPP_D14, NONE),
/* D15: Not Connected */

View file

@ -199,7 +199,7 @@ chip soc/intel/alderlake
"M.2/M 2230"
"SlotDataBusWidth1X"
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D13)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H2)"
register "srcclk_pin" = "2"
register "skip_on_off_support" = "1"

View file

@ -222,7 +222,7 @@ const struct pad_config gpio_table[] = {
/* D12: GSPI 2 MOSI FPS */
PAD_NC(GPP_D12, NONE),
/* D13: Wireless LAN Wake */
PAD_CFG_GPO(GPP_D13, 1, PLTRST),
PAD_NC(GPP_D13, NONE),
/* D14: CPU M.2 SSD Power Enable */
PAD_CFG_GPO(GPP_D14, 1, PLTRST),
/* D15: Not Connected */

View file

@ -205,7 +205,7 @@ chip soc/intel/alderlake
"M.2/M 2230"
"SlotDataBusWidth1X"
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D13)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H2)"
register "srcclk_pin" = "2"
register "add_acpi_dma_property" = "true"

View file

@ -227,7 +227,7 @@ const struct pad_config gpio_table[] = {
/* D12: ES8336_INT_N */
PAD_NC(GPP_D12, NONE),
/* D13: Wireless LAN Wake */
PAD_CFG_GPO(GPP_D13, 1, PLTRST),
PAD_NC(GPP_D13, NONE),
/* D14: CPU M.2 SSD Power Enable */
PAD_CFG_GPO(GPP_D14, 1, PLTRST),
/* D15: Not Connected */

View file

@ -221,7 +221,7 @@ const struct pad_config gpio_table[] = {
/* D12: GSPI 2 MOSI FPS */
PAD_NC(GPP_D12, NONE),
/* D13: Wireless LAN Wake */
PAD_CFG_GPO(GPP_D13, 1, PLTRST),
PAD_NC(GPP_D13, NONE),
/* D14: ALS Interrupt */
PAD_NC(GPP_D14, NONE),
/* D15: Not Connected */