soc/qualcomm/x1p42100: Use 4K for memory region alignment

The alignment for several memory regions in the linker script was
specified using numeric values like `4096` or the hexadecimal `0x1000`.
Replace these values with the more readable `4K` shorthand. This change
improves consistency within the file and has no functional impact on
the generated binary.

TEST=Build and boot google/quenbi.

Change-Id: I28fdf3714d96f5e68a615d1550cf47d975ab5685
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88803
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Subrata Banik 2025-08-17 09:19:19 +05:30
commit cdd42ccde8

View file

@ -7,8 +7,8 @@
SECTIONS
{
AOPSRAM_START(0x0B000000)
REGION(aop_code_ram, 0x0B000000, 0x80000, 4096)
REGION(aop_data_ram, 0x0B0E0000, 0x20000, 4096)
REGION(aop_code_ram, 0x0B000000, 0x80000, 4K)
REGION(aop_data_ram, 0x0B0E0000, 0x20000, 4K)
AOPSRAM_END(0x0B100000)
SSRAM_START(0x14680000)
@ -44,15 +44,15 @@ SECTIONS
REGION(shrm, 0x24040000, 128K , 4K)
DRAM_START(0x80000000)
REGION(dram_cpucp, 0x80A00000, 0xBA0000, 0x1000)
REGION(dram_ramdump, 0x81A00000, 0x200000, 0x1000)
REGION(dram_aop, 0x81C00000, 0xF780000, 0x1000)
REGION(dram_cpucp, 0x80A00000, 0xBA0000, 4K)
REGION(dram_ramdump, 0x81A00000, 0x200000, 4K)
REGION(dram_aop, 0x81C00000, 0xF780000, 4K)
POSTRAM_CBFS_CACHE(0x9F800000, 16M)
RAMSTAGE(0xA0800000, 16M)
REGION(dram_tz, 0xD8000000, 0xD6000, 0x1000)
REGION(dram_tz, 0xD8000000, 0xD6000, 4K)
BL31(0xD80D6000, 1M)
REGION(dram_tz_rem, 0xD81D6000, 0x72EA000, 0x1000)
REGION(dram_smem, 0xFF800000, 0x800000, 0x1000)
REGION(dram_tz_rem, 0xD81D6000, 0x72EA000, 4K)
REGION(dram_smem, 0xFF800000, 0x800000, 4K)
DRAM_END(0x100000000)
/*