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mb/novacustom/mtl-h/ramstage.c: Set Pinmux FSP UPDs

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Set Pin Mux FSP UPDs as per mainboard schematic.

Change-Id: Id075e236cee64527aab644616186a3e223c1bfc3
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86788
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Michał Kopeć 2025-03-10 14:40:38 +01:00 • committed by Matt DeVillier
commit cbafdf6d00
1 changed files with 9 additions and 0 deletions
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9
src/mainboard/novacustom/mtl-h/ramstage.c
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@ -35,6 +35,15 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
params->PchEspiHostC10ReportEnable = 1;
// Pinmux configuration
params->PchSerialIoI2cSdaPinMux[3] = 0x1A45CA06; // GPP_H6
params->PchSerialIoI2cSclPinMux[3] = 0x1A45AA07; // GPP_H7
params->PchSerialIoI2cSdaPinMux[4] = 0x8A44CC0C; // GPP_E12
params->PchSerialIoI2cSclPinMux[4] = 0x8A44AC0D; // GPP_E13
params->PchSerialIoI2cSdaPinMux[5] = 0x8A46CE0D; // GPP_F13
params->PchSerialIoI2cSclPinMux[5] = 0x8A46AE0C; // GPP_F12
params->CnviRfResetPinMux = 0x194CE404; // GPP_F04
params->CnviClkreqPinMux = 0x394CE605; // GPP_F05