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mb/nissa/var/meliks: Update GPP_E7 strap configuration

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Meliks uses GPP_E7 to determine the channel count of the RAM chip in
romstage, move its configuration to early_gpio_table from
override_gpio_table to be ready to use at that moment.

And early stage meliks boards didn't implement the GPP_E7 strap but
leaved it as NC. All of them used two channel ram chip, so add DN_20K
for them not to disable any memory channel. Otherwise, they might not
be able to boot since memory training will be failed due to the
incorrect memory channel information.

BUG=None
BRANCH=nissa
TEST=FW_NAME=meliks emerge-nissa coreboot

Change-Id: Icf71c3a1f24d3dcbff6ba5e646e9f805144add71
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86908
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Jayvik Desai <jayvik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Seunghwan Kim 2025-03-18 10:00:17 +09:00 • committed by Subrata Banik
commit cadfb07dbe
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/brya/variants/meliks/gpio.c
View file

@ -22,8 +22,6 @@ static const struct pad_config override_gpio_table[] = {
/* D8 : SD_CLKREQ_ODL ==> NC */
PAD_NC(GPP_D8, NONE),
/* E7 : NC ==> GPP_E7_STRAP */
PAD_CFG_GPI_LOCK(GPP_E7, NONE, LOCK_CONFIG),
/* E14 : EDP_HPD ==> NC */
PAD_NC(GPP_E14, NONE),
/* E20 : HDMI_DDC_SCL ==> NC */
@ -82,6 +80,8 @@ static const struct pad_config override_gpio_table[] = {
static const struct pad_config early_gpio_table[] = {
/* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
/* E7 : NC ==> GPP_E7_STRAP */
PAD_CFG_GPI_LOCK(GPP_E7, DN_20K, LOCK_CONFIG),
/* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
/* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */