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soc/amd/glinda,picasso/xhci: use XHCI_GEVENT define

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The other AMD SoCs already use the XHCI_GEVENT define and since it's
defined as GEVENT_31, this won't change the behavior.

Change-Id: I895f453497f6e03e1aff237ba6d6ec1ebecfaaaf
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90876
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
This commit is contained in:
Felix Held 2026-01-23 17:08:16 +01:00 • committed by Matt DeVillier
commit c9cbd45cbe
2 changed files with 8 additions and 6 deletions
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9
src/soc/amd/glinda/xhci.c
View file

@ -4,6 +4,7 @@
#include <amdblocks/gpio.h>
#include <amdblocks/smi.h>
#include <amdblocks/xhci.h>
#include <bootstate.h>
#include <device/device.h>
#include <device/pci_ids.h>
@ -14,25 +15,25 @@
static const struct sci_source xhci_sci_sources[] = {
{
.scimap = SMITYPE_XHC0_PME,
.gpe = GEVENT_31,
.gpe = XHCI_GEVENT,
.direction = SMI_SCI_LVL_HIGH,
.level = SMI_SCI_EDG
},
{
.scimap = SMITYPE_XHC1_PME,
.gpe = GEVENT_31,
.gpe = XHCI_GEVENT,
.direction = SMI_SCI_LVL_HIGH,
.level = SMI_SCI_EDG
},
{
.scimap = SMITYPE_XHC3_PME,
.gpe = GEVENT_31,
.gpe = XHCI_GEVENT,
.direction = SMI_SCI_LVL_HIGH,
.level = SMI_SCI_EDG
},
{
.scimap = SMITYPE_XHC4_PME,
.gpe = GEVENT_31,
.gpe = XHCI_GEVENT,
.direction = SMI_SCI_LVL_HIGH,
.level = SMI_SCI_EDG
}

5
src/soc/amd/picasso/xhci.c
View file

@ -2,6 +2,7 @@
#include <amdblocks/gpio.h>
#include <amdblocks/smi.h>
#include <amdblocks/xhci.h>
#include <bootstate.h>
#include <device/device.h>
#include <drivers/usb/pci_xhci/pci_xhci.h>
@ -12,13 +13,13 @@
static const struct sci_source xhci_sci_sources[] = {
{
.scimap = SMITYPE_XHC0_PME,
.gpe = GEVENT_31,
.gpe = XHCI_GEVENT,
.direction = SMI_SCI_LVL_HIGH,
.level = SMI_SCI_EDG
},
{
.scimap = SMITYPE_XHC1_PME,
.gpe = GEVENT_31,
.gpe = XHCI_GEVENT,
.direction = SMI_SCI_LVL_HIGH,
.level = SMI_SCI_EDG
}