From c9cbd45cbed1438762174d45a8341bf645fc8721 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 23 Jan 2026 17:08:16 +0100 Subject: [PATCH] soc/amd/glinda,picasso/xhci: use XHCI_GEVENT define The other AMD SoCs already use the XHCI_GEVENT define and since it's defined as GEVENT_31, this won't change the behavior. Change-Id: I895f453497f6e03e1aff237ba6d6ec1ebecfaaaf Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/90876 Tested-by: build bot (Jenkins) Reviewed-by: Maximilian Brune --- src/soc/amd/glinda/xhci.c | 9 +++++---- src/soc/amd/picasso/xhci.c | 5 +++-- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/src/soc/amd/glinda/xhci.c b/src/soc/amd/glinda/xhci.c index b67bb5a060..64eb72c8d8 100644 --- a/src/soc/amd/glinda/xhci.c +++ b/src/soc/amd/glinda/xhci.c @@ -4,6 +4,7 @@ #include #include +#include #include #include #include @@ -14,25 +15,25 @@ static const struct sci_source xhci_sci_sources[] = { { .scimap = SMITYPE_XHC0_PME, - .gpe = GEVENT_31, + .gpe = XHCI_GEVENT, .direction = SMI_SCI_LVL_HIGH, .level = SMI_SCI_EDG }, { .scimap = SMITYPE_XHC1_PME, - .gpe = GEVENT_31, + .gpe = XHCI_GEVENT, .direction = SMI_SCI_LVL_HIGH, .level = SMI_SCI_EDG }, { .scimap = SMITYPE_XHC3_PME, - .gpe = GEVENT_31, + .gpe = XHCI_GEVENT, .direction = SMI_SCI_LVL_HIGH, .level = SMI_SCI_EDG }, { .scimap = SMITYPE_XHC4_PME, - .gpe = GEVENT_31, + .gpe = XHCI_GEVENT, .direction = SMI_SCI_LVL_HIGH, .level = SMI_SCI_EDG } diff --git a/src/soc/amd/picasso/xhci.c b/src/soc/amd/picasso/xhci.c index a238916b71..1258234df4 100644 --- a/src/soc/amd/picasso/xhci.c +++ b/src/soc/amd/picasso/xhci.c @@ -2,6 +2,7 @@ #include #include +#include #include #include #include @@ -12,13 +13,13 @@ static const struct sci_source xhci_sci_sources[] = { { .scimap = SMITYPE_XHC0_PME, - .gpe = GEVENT_31, + .gpe = XHCI_GEVENT, .direction = SMI_SCI_LVL_HIGH, .level = SMI_SCI_EDG }, { .scimap = SMITYPE_XHC1_PME, - .gpe = GEVENT_31, + .gpe = XHCI_GEVENT, .direction = SMI_SCI_LVL_HIGH, .level = SMI_SCI_EDG }