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nyan: Set SPI4 speed to 33MHz

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This sets the SPI4 speed to 33MHz. The bootrom sets it to
408/22=18.5MHz, so this increases the frequency substantially.

However, we still do not achieve much gain from this because there
are still annoying ~500-600ns pauses in between byte transfers.
Copying ramstage takes around 62ms instead of 67ms.

TODO: We should be able to go up to 50MHz, but that does not work
reliably.

BUG=none
BRANCH=none
TEST=tested on nyan, verified frequency with logic analyzer
Signed-off-by: David Hendricks <dhendrix@chromium.org>

Change-Id: I4e56bec24c2a30ef0aa0b279b774c55b3d897410
Reviewed-on: https://chromium-review.googlesource.com/177038
Reviewed-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
David Hendricks 2013-11-15 15:47:26 -08:00 • committed by chrome-internal-fetch
commit c98de65482
1 changed files with 4 additions and 0 deletions
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4
src/mainboard/google/nyan/bootblock.c
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@ -41,6 +41,10 @@ static void set_clock_sources(void)
/* TODO: is the 1.333MHz correct? This may have always been bogus... */
clock_configure_source(i2c5, CLK_M, 1333);
/* TODO: We should be able to set this to 50MHz, but that did not seem
* reliable. */
clock_configure_source(sbc4, PLLP, 33333);
}
void bootblock_mainboard_init(void)