From c98de65482fabdb5c76944fe3bf762191b3a0a55 Mon Sep 17 00:00:00 2001 From: David Hendricks Date: Fri, 15 Nov 2013 15:47:26 -0800 Subject: [PATCH] nyan: Set SPI4 speed to 33MHz This sets the SPI4 speed to 33MHz. The bootrom sets it to 408/22=18.5MHz, so this increases the frequency substantially. However, we still do not achieve much gain from this because there are still annoying ~500-600ns pauses in between byte transfers. Copying ramstage takes around 62ms instead of 67ms. TODO: We should be able to go up to 50MHz, but that does not work reliably. BUG=none BRANCH=none TEST=tested on nyan, verified frequency with logic analyzer Signed-off-by: David Hendricks Change-Id: I4e56bec24c2a30ef0aa0b279b774c55b3d897410 Reviewed-on: https://chromium-review.googlesource.com/177038 Reviewed-by: Tom Warren Reviewed-by: Julius Werner Commit-Queue: David Hendricks Tested-by: David Hendricks --- src/mainboard/google/nyan/bootblock.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/mainboard/google/nyan/bootblock.c b/src/mainboard/google/nyan/bootblock.c index 4ee1aacc88..e5ae58d77a 100644 --- a/src/mainboard/google/nyan/bootblock.c +++ b/src/mainboard/google/nyan/bootblock.c @@ -41,6 +41,10 @@ static void set_clock_sources(void) /* TODO: is the 1.333MHz correct? This may have always been bogus... */ clock_configure_source(i2c5, CLK_M, 1333); + + /* TODO: We should be able to set this to 50MHz, but that did not seem + * reliable. */ + clock_configure_source(sbc4, PLLP, 33333); } void bootblock_mainboard_init(void)