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mb/google/fizz: Fix USB port defintions

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commit 6c83a71b0a ("skl mainboards/dt: Move usb{2,3}_ports settings
into XHCI device scope") not only moved the USB port definitions under
the XHCI device reference, but also combined multiple register
definitions. In doing so, it broke the inheritance from the baseboard,
since the variant overridetree registers now replaced the entire
usb2_ports/usb3_ports structs, rather than replacing individual array
elements therein. This resulted in any USB ports inherited from the
baseboard and not overridden by the variant being non-functional as they
were not included in the resulting combined devicetree.

To fix this, return to overriding individual array elements in the
usb2/3_ports structs.

TEST=build/boot google/fizz/var/karma. Verify all USB ports present and
functional. Verify mainboard/static.c in built shows all ports.

Change-Id: I0e80bf4949a857c21d44537eb720a7a8a7db2f80
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84955
Reviewed-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier 2024-11-01 09:56:36 -05:00
commit c7bca700c8
3 changed files with 34 additions and 44 deletions
Download patch file Download diff file Expand all files Collapse all files

33
src/mainboard/google/fizz/variants/baseboard/devicetree.cb
View file

@ -204,25 +204,22 @@ chip soc/intel/skylake
device ref igpu on end
device ref sa_thermal on end
device ref south_xhci on
register "usb2_ports" = "{
[0] = USB2_PORT_LONG(OC0), // Type-C
[1] = USB2_PORT_MID(OC3), // Type-A Rear
[2] = USB2_PORT_MID(OC2), // Type-A Front
[3] = USB2_PORT_MID(OC2), // Type-A Front
[4] = USB2_PORT_MID(OC1), // Type-A Rear
[5] = USB2_PORT_MID(OC1), // Type-A Rear
[6] = USB2_PORT_MID(OC_SKIP), // Bluetooth
[7] = USB2_PORT_MID(OC_SKIP), // Type-A 2.0 / Debug
}"
register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # Type-C
register "usb2_ports[1]" = "USB2_PORT_MID(OC3)" # Type-A Rear
register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Front
register "usb2_ports[3]" = "USB2_PORT_MID(OC2)" # Type-A Front
register "usb2_ports[4]" = "USB2_PORT_MID(OC1)" # Type-A Rear
register "usb2_ports[5]" = "USB2_PORT_MID(OC1)" # Type-A Rear
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A 2.0 / Debug
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Rear
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Front
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Front
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC1)" # Type-A Rear
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC1)" # Type-A Rear
register "usb3_ports" = "{
[0] = USB3_PORT_DEFAULT(OC0), // Type-C
[1] = USB3_PORT_DEFAULT(OC3), // Type-A Rear
[2] = USB3_PORT_DEFAULT(OC2), // Type-A Front
[3] = USB3_PORT_DEFAULT(OC2), // Type-A Front
[4] = USB3_PORT_DEFAULT(OC1), // Type-A Rear
[5] = USB3_PORT_DEFAULT(OC1), // Type-A Rear
}"
chip drivers/usb/acpi
register "desc" = ""Root Hub""
register "type" = "UPC_TYPE_HUB"

29
src/mainboard/google/fizz/variants/endeavour/overridetree.cb
View file

@ -22,23 +22,20 @@ chip soc/intel/skylake
device domain 0 on
device ref south_xhci on
register "usb2_ports" = "{
[0] = USB2_PORT_LONG(OC_SKIP), // Type-C
[1] = USB2_PORT_MID(OC_SKIP), // HDMI
[2] = USB2_PORT_MID(OC2), // Type-A Rear
[3] = USB2_PORT_MID(OC2), // Type-A Rear
[4] = USB2_PORT_MID(OC3), // Type-A Rear
[5] = USB2_PORT_MID(OC_SKIP), // HDMI Audio
[6] = USB2_PORT_MID(OC_SKIP), // Bluetooth
}"
register "usb2_ports[0]" = "USB2_PORT_LONG(OC_SKIP)" # Type-C
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # HDMI
register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Rear
register "usb2_ports[3]" = "USB2_PORT_MID(OC2)" # Type-A Rear
register "usb2_ports[4]" = "USB2_PORT_MID(OC3)" # Type-A Rear
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # HDMI Audio
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # HDMI
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Rear
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Rear
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Rear
register "usb3_ports" = "{
[0] = USB3_PORT_DEFAULT(OC_SKIP), // Type-C
[1] = USB3_PORT_DEFAULT(OC_SKIP), // HDMI
[2] = USB3_PORT_DEFAULT(OC2), // Type-A Rear
[3] = USB3_PORT_DEFAULT(OC2), // Type-A Rear
[4] = USB3_PORT_DEFAULT(OC3), // Type-A Rear
}"
chip drivers/usb/acpi
device usb 0.0 on
chip drivers/usb/acpi

16
src/mainboard/google/fizz/variants/karma/overridetree.cb
View file

@ -15,17 +15,13 @@ chip soc/intel/skylake
#| Camera | 8 | |
#| Touchsreen | 10 | |
#+----------------+-------+-----------------------------------+
register "usb2_ports" = "{
[2] = USB2_PORT_MID(OC2), // Type-A Side
[3] = USB2_PORT_MID(OC_SKIP), // Card reader
[7] = USB2_PORT_MID(OC_SKIP), // Camera
[9] = USB2_PORT_MID(OC_SKIP), // Touchscreen
}"
register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Side
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Card reader
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Touchscreen
register "usb3_ports" = "{
[2] = USB3_PORT_DEFAULT(OC2), // Type-A Side
[3] = USB3_PORT_DEFAULT(OC_SKIP), // Card reader
}"
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Side
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Card reader
chip drivers/usb/acpi
device usb 0.0 on