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beltino: Disable LPSS I2C controllers

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There is nothing attached to these devices so we can disable
them as well as the function 0 DMA controller.

Also remove the EC SMI/SCI mappings since there is no EC.

BUG=chrome-os-partner:23593
BRANCH=beltino
TEST=build and boot on beltino

Change-Id: Iedfe711058676f7ee118b0b66ab0f8a1e792ea87
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174752
Reviewed-by: Stefan Reinauer <reinauer@google.com>
This commit is contained in:
Duncan Laurie 2013-10-25 09:30:57 -07:00 • committed by chrome-internal-fetch
commit c70add87a4
1 changed files with 5 additions and 7 deletions
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12
src/mainboard/google/beltino/devicetree.cb
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@ -46,11 +46,9 @@ chip northbridge/intel/haswell
# SuperIO range is 0x700-0x73f
register "gen2_dec" = "0x003c0701"
# EC_SMI is GPIO34
register "alt_gp_smi_en" = "0x0004"
register "alt_gp_smi_en" = "0x0000"
register "gpe0_en_1" = "0x00000000"
# EC_SCI is GPIO36
register "gpe0_en_2" = "0x00000010"
register "gpe0_en_2" = "0x00000000"
register "gpe0_en_3" = "0x00000000"
register "gpe0_en_4" = "0x00000000"
@ -73,9 +71,9 @@ chip northbridge/intel/haswell
device pci 13.0 off end # Smart Sound Audio DSP
device pci 14.0 on end # USB3 XHCI
device pci 15.0 on end # Serial I/O DMA
device pci 15.1 on end # I2C0
device pci 15.2 on end # I2C1
device pci 15.0 off end # Serial I/O DMA
device pci 15.1 off end # I2C0
device pci 15.2 off end # I2C1
device pci 15.3 off end # GSPI0
device pci 15.4 off end # GSPI1
device pci 15.5 off end # UART0