beltino: Fix thermal zone to use SIO PWM/TACH port 2

Fan is attached to port 2 instead of 3.

BUG=chrome-os-partner:23593
BRANCH=beltino
TEST=tested with 4-wire fan on beltino board

Change-Id: I9878063a24b0b908c74522580f776a4ce7d03d75
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174751
Reviewed-by: Stefan Reinauer <reinauer@google.com>
This commit is contained in:
Duncan Laurie 2013-10-25 07:41:24 -07:00 committed by chrome-internal-fetch
commit 59027a3fda

View file

@ -141,12 +141,12 @@ Scope (\_TZ)
}
Method (_ON) {
Store (0, \FLVL)
Store (\F0PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
Store (\F0PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (1, \FLVL)
Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
}
@ -162,12 +162,12 @@ Scope (\_TZ)
}
Method (_ON) {
Store (1, \FLVL)
Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (2, \FLVL)
Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
}
@ -183,12 +183,12 @@ Scope (\_TZ)
}
Method (_ON) {
Store (2, \FLVL)
Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (3, \FLVL)
Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
}
@ -204,12 +204,12 @@ Scope (\_TZ)
}
Method (_ON) {
Store (3, \FLVL)
Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (4, \FLVL)
Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
}
@ -225,12 +225,12 @@ Scope (\_TZ)
}
Method (_ON) {
Store (4, \FLVL)
Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (4, \FLVL)
Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
}