soc/amd/cezanne/fsp_m_params: add UPD pointer parameter to mb callback

This allows the mainboard code to change FSP-M parameters depending on
parameters that are only known at run time and not at build time.

Mirrors change previous done for Mendocino and newer SoCs.

Change-Id: I6790648da3724a06a127c1cef939366588668440
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88973
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>

src/mainboard/google/guybrush/romstage.c

@@ -3,7 +3,7 @@
 #include <baseboard/variants.h>
 #include <soc/platform_descriptors.h>
 
-void mb_pre_fspm(void)
+void mb_pre_fspm(FSP_M_CONFIG *mcfg)
 {
 	size_t base_num_gpios, override_num_gpios;
 	const struct soc_amd_gpio *base_gpios, *override_gpios;

src/soc/amd/cezanne/fsp_m_params.c

@@ -16,7 +16,7 @@
 #include <vendorcode/amd/fsp/cezanne/FspUsb.h>
 #include "chip.h"
 
-__weak void mb_pre_fspm(void)
+__weak void mb_pre_fspm(FSP_M_CONFIG *mcfg)
 {
 }
 
@@ -181,5 +181,5 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
 
 	fsp_fill_pcie_ddi_descriptors(mcfg);
 	fsp_assign_ioapic_upds(mcfg);
-	mb_pre_fspm();
+	mb_pre_fspm(mcfg);
 }

src/soc/amd/cezanne/include/soc/platform_descriptors.h

@@ -12,6 +12,6 @@ void mainboard_get_dxio_ddi_descriptors(
 		const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num,
 		const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num);
 
-void mb_pre_fspm(void);
+void mb_pre_fspm(FSP_M_CONFIG *mcfg);
 
 #endif /* AMD_CEZANNE_PLATFORM_DESCRIPTORS_H */