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soc/intel/pantherlake: Update PS1 threshold to the latest recommendations

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Update the PS1 threshold values for VR_DOMAIN_IA, VR_DOMAIN_GT, and
VR_DOMAIN_SA from 20 A to 15 A, following the recommendations in the
Panther Lake H Platform Design Guide (Draft > 2.1). This change ensures
that power state thresholds are consistent with the most recent platform
specifications, improving accuracy and system behavior under varying
power conditions.

TEST=Fatcat device boots to OS.

Change-Id: I358d4d94c3800ff5b658cb875c90ee7409d86377
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90727
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jeremy Compostella 2026-01-12 10:40:02 -08:00 • committed by Matt DeVillier
commit c09352d58d
1 changed files with 4 additions and 4 deletions
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8
src/soc/intel/pantherlake/chipset_ptl.cb
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@ -82,11 +82,11 @@ chip soc/intel/pantherlake
register "tdc_time_window_ms[VR_DOMAIN_IA]" = "28000"
# Set the power state thresholds according to document 813278
# Panther Lake H Platform - Design Guide - Rev 2.0
# Panther Lake H Platform - Design Guide - Draft > 2.1
register "ps1_threshold" = "{
[VR_DOMAIN_IA] = 20 * 4,
[VR_DOMAIN_GT] = 20 * 4,
[VR_DOMAIN_SA] = 20 * 4
[VR_DOMAIN_IA] = 15 * 4,
[VR_DOMAIN_GT] = 15 * 4,
[VR_DOMAIN_SA] = 15 * 4
}"
register "ps2_threshold" = "{
[VR_DOMAIN_IA] = 5 * 4,