soc/intel: Replace sa_get_tseg_size() with CONFIG_SMM_TSEG_SIZE

Remove the sa_get_tseg_size() function and replace all its usage with
CONFIG_SMM_TSEG_SIZE configuration option. The TSEG size is now
obtained directly from the configuration instead of being calculated
dynamically. The existing calculation assumes GSM and TSEG regions are
contiguous, but there is no guarantee this is always true depending on
how FSP operates. This could lead to incorrect size calculations.
Using CONFIG_SMM_TSEG_SIZE is more reliable as this value is provided
to the FSP during initialization.

This change:
- Removes sa_get_tseg_size() function declaration and implementation
- Updates smm_region() to use CONFIG_SMM_TSEG_SIZE directly
- Updates Alder Lake, Meteor Lake, and Panther Lake system agent code
to use CONFIG_SMM_TSEG_SIZE instead of sa_get_tseg_size()

Before (sa_get_tseg_size):

[SPEW ]  TsegBase = 0x78000000
[SPEW ]  GsmBase = 0x7BC00000
[DEBUG]  sa_get_tseg_size:0x3c00000
[DEBUG]  New SMBASE=0x7b5ec000 IEDBASE=0x7b800000
[DEBUG]  Writing SMRR. base = 0x78000006, mask=0xfc400c00
System hangs during SMM relocation

After (CONFIG_SMM_TSEG_SIZE):

[SPEW ]  TsegBase = 0x78000000
[SPEW ]  GsmBase = 0x7BC00000
[DEBUG]  CONFIG_SMM_TSEG_SIZE:0x2000000
[DEBUG]  New SMBASE=0x799ec000 IEDBASE=0x79c00000
[DEBUG]  Writing SMRR. base = 0x78000006, mask=0xfe000c00
[DEBUG]  Relocation complete.
System boots successfully

BUG=none

Change-Id: Ie2a1f3dd68941924e056a12f01857c1182b69198
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91063
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Kim, Wonkyu <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>

src/soc/intel/alderlake/systemagent.c

@@ -116,7 +116,7 @@ void soc_add_configurable_mmio_resources(struct device *dev, int *resource_cnt)
 	}
 
 	/* TSEG */
-	size = sa_get_tseg_size();
+	size = CONFIG_SMM_TSEG_SIZE;
 	tseg_base = sa_get_tseg_base();
 	if (size > 0)
 		set_mmio_resource(&(cfg_rsrc[count++]), tseg_base, size, "TSEG");

src/soc/intel/common/block/include/intelblocks/systemagent.h

@@ -91,8 +91,6 @@ uintptr_t sa_get_tolud_base(void);
 uintptr_t sa_get_gsm_base(void);
 /* API to get TSEG base address */
 uintptr_t sa_get_tseg_base(void);
-/* API to get TSEG size */
-size_t sa_get_tseg_size(void);
 /* API to lock PAM registers */
 void sa_lock_pam(void);
 /* API to get MMIO config size */

src/soc/intel/common/block/systemagent/memmap.c

@@ -54,7 +54,7 @@
 void smm_region(uintptr_t *start, size_t *size)
 {
 	*start = sa_get_tseg_base();
-	*size = sa_get_tseg_size();
+	*size = CONFIG_SMM_TSEG_SIZE;
 }
 
 void fill_postcar_frame(struct postcar_frame *pcf)

src/soc/intel/common/block/systemagent/systemagent_early.c

@@ -146,11 +146,6 @@ uintptr_t sa_get_tseg_base(void)
 	return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, TSEG), 1*MiB);
 }
 
-size_t sa_get_tseg_size(void)
-{
-	return sa_get_gsm_base() - sa_get_tseg_base();
-}
-
 union dpr_register txt_get_chipset_dpr(void)
 {
 	return (union dpr_register) { .raw = pci_read_config32(SA_DEV_ROOT, DPR) };

src/soc/intel/meteorlake/systemagent.c

@@ -108,7 +108,7 @@ void soc_add_configurable_mmio_resources(struct device *dev, int *resource_cnt)
 	}
 
 	/* TSEG */
-	size = sa_get_tseg_size();
+	size = CONFIG_SMM_TSEG_SIZE;
 	tseg_base = sa_get_tseg_base();
 	if (size > 0)
 		set_mmio_resource(&(cfg_rsrc[count++]), tseg_base, size, "TSEG");

src/soc/intel/pantherlake/systemagent.c

@@ -105,7 +105,7 @@ void soc_add_configurable_mmio_resources(struct device *dev, int *resource_cnt)
 	}
 
 	/* TSEG */
-	size = sa_get_tseg_size();
+	size = CONFIG_SMM_TSEG_SIZE;
 	tseg_base = sa_get_tseg_base();
 	if (size > 0)
 		set_mmio_resource(&(cfg_rsrc[count++]), tseg_base, size, "TSEG");