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mb/google/fatcat: Fix fast_vmode_i_trip indexing in devicetree

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Update fast_vmode_i_trip array references as per 813278_Rev2p1p1 to use
PTL_SKU_* constants instead of PTL_CORE_* constants. This aligns with
the corrected indexing scheme used in the SoC VR configuration code.

TEST=Verify IccLimit value for different SKUs in FSP debug log

Change-Id: I90a5c6e03633ba2b4a0a132ed9f94d8e5c4ff8bf
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91049
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Sowmya Aralguppe 2026-02-02 12:16:41 +05:30 • committed by Matt DeVillier
commit 1fe88cc716
1 changed files with 18 additions and 4 deletions
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30
src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
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@ -87,22 +87,36 @@ chip soc/intel/pantherlake
register "cep_enable[VR_DOMAIN_GT]" = "true"
register "enable_fast_vmode[VR_DOMAIN_SA]" = "true"
register "cep_enable[VR_DOMAIN_SA]" = "true"
register "fast_vmode_i_trip[PTL_CORE_1]" = "{
register "fast_vmode_i_trip[PTL_SKU_1]" = "{
[VR_DOMAIN_IA] = 63 * 4,
[VR_DOMAIN_GT] = 38 * 4,
[VR_DOMAIN_SA] = 38 * 4
}"
register "fast_vmode_i_trip[PTL_CORE_2]" = "{
[VR_DOMAIN_IA] = 63 * 4,
[VR_DOMAIN_GT] = 38 * 4,
[VR_DOMAIN_SA] = 38 * 4
}"
register "fast_vmode_i_trip[PTL_CORE_3]" = "{
register "fast_vmode_i_trip[PTL_SKU_2]" = "{
[VR_DOMAIN_IA] = 75 * 4,
[VR_DOMAIN_GT] = 75 * 4,
[VR_DOMAIN_SA] = 38 * 4
}"
register "fast_vmode_i_trip[PTL_SKU_3]" = "{
[VR_DOMAIN_IA] = 75 * 4,
[VR_DOMAIN_GT] = 38 * 4,
[VR_DOMAIN_SA] = 38 * 4
}"
register "fast_vmode_i_trip[PTL_SKU_5]" = "{
[VR_DOMAIN_IA] = 63 * 4,
[VR_DOMAIN_GT] = 38 * 4,
[VR_DOMAIN_SA] = 38 * 4
}"
register "fast_vmode_i_trip[PTL_SKU_6]" = "{
[VR_DOMAIN_IA] = 75 * 4,
[VR_DOMAIN_GT] = 75 * 4,
[VR_DOMAIN_SA] = 38 * 4
}"
register "fast_vmode_i_trip[PTL_SKU_7]" = "{
[VR_DOMAIN_IA] = 75 * 4,
[VR_DOMAIN_GT] = 38 * 4,
[VR_DOMAIN_SA] = 38 * 4
}"
# Set on-board graphics as primary display
register "skip_ext_gfx_scan" = "true"