mb/google/fatcat/var/fatcat: Implement barrel jack presence check

Uses fw_config to check if barrel jack PSU is configured. If
`PSU_BJ` is selected, checks hardware presence via
`google_chromeec_is_barrel_charger_present()`.

Allows 'fatcat' to adapt based on configured power source.

Includes:
- Adds `variant.c` to ramstage build in `Makefile.mk`.
- Adds `PSU` field (`PSU_USBC`: 0, `PSU_BJ`: 1) to `overridetree.cb`.
- Includes `ec.h` in `variant.c`.

TEST=Boot time savings ~62ms on google/fatcat with PSU=0 (USB-C).

Change-Id: I68507034cfbf4caa8e5c2ac9c7bebf758a5a5439
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87207
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: YH Lin <yueherngl@google.com>
Reviewed-by: Jayvik Desai <jayvik@google.com>
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>

src/mainboard/google/fatcat/variants/fatcat/Makefile.mk

@@ -6,4 +6,5 @@ romstage-y += memory.c
 romstage-$(CONFIG_FW_CONFIG) += fw_config.c
 ramstage-y += gpio.c
 romstage-$(CONFIG_FW_CONFIG) += variant.c
+ramstage-$(CONFIG_FW_CONFIG) += variant.c
 ramstage-$(CONFIG_FW_CONFIG) += fw_config.c

src/mainboard/google/fatcat/variants/fatcat/overridetree.cb

@@ -67,6 +67,10 @@ fw_config
 		option ISH_DISABLE		0
 		option ISH_ENABLE		1
 	end
+	field PSU 25
+		option PSU_USBC			0
+		option PSU_BJ			1
+	end
 end
 
 chip soc/intel/pantherlake

src/mainboard/google/fatcat/variants/fatcat/variant.c

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <baseboard/variants.h>
+#include <ec/google/chromeec/ec.h>
 #include <fsp/api.h>
 #include <fw_config.h>
 #include <sar.h>
@@ -84,3 +85,11 @@ void variant_update_soc_memory_init_params(FSPM_UPD *memupd)
 		m_cfg->PchHdaSdiEnable[1] = false;
 	}
 }
+
+bool variant_is_barrel_charger_present(void)
+{
+	if (fw_config_probe(FW_CONFIG(PSU, PSU_BJ)))
+		return google_chromeec_is_barrel_charger_present();
+	else
+		return false;
+}