diff --git a/src/mainboard/google/fatcat/variants/fatcat/Makefile.mk b/src/mainboard/google/fatcat/variants/fatcat/Makefile.mk
index b9f1fd15dd..3fdd4642c0 100644
--- a/src/mainboard/google/fatcat/variants/fatcat/Makefile.mk
+++ b/src/mainboard/google/fatcat/variants/fatcat/Makefile.mk
@@ -6,4 +6,5 @@ romstage-y += memory.c
 romstage-$(CONFIG_FW_CONFIG) += fw_config.c
 ramstage-y += gpio.c
 romstage-$(CONFIG_FW_CONFIG) += variant.c
+ramstage-$(CONFIG_FW_CONFIG) += variant.c
 ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
diff --git a/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb b/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb
index c6a63c3fcb..e154ffc46c 100644
--- a/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb
+++ b/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb
@@ -67,6 +67,10 @@ fw_config
 		option ISH_DISABLE		0
 		option ISH_ENABLE		1
 	end
+	field PSU 25
+		option PSU_USBC			0
+		option PSU_BJ			1
+	end
 end
 
 chip soc/intel/pantherlake
diff --git a/src/mainboard/google/fatcat/variants/fatcat/variant.c b/src/mainboard/google/fatcat/variants/fatcat/variant.c
index 5ba7683640..3e0ee54505 100644
--- a/src/mainboard/google/fatcat/variants/fatcat/variant.c
+++ b/src/mainboard/google/fatcat/variants/fatcat/variant.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <baseboard/variants.h>
+#include <ec/google/chromeec/ec.h>
 #include <fsp/api.h>
 #include <fw_config.h>
 #include <sar.h>
@@ -84,3 +85,11 @@ void variant_update_soc_memory_init_params(FSPM_UPD *memupd)
 		m_cfg->PchHdaSdiEnable[1] = false;
 	}
 }
+
+bool variant_is_barrel_charger_present(void)
+{
+	if (fw_config_probe(FW_CONFIG(PSU, PSU_BJ)))
+		return google_chromeec_is_barrel_charger_present();
+	else
+		return false;
+}