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tegra124: When setting up the main CPU, set its CPSR appropriately.

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The CPSR isn't set up in the bootblock like it normally would be since the
bootblock executes on the AVP and not the main CPUs like the remainder of the
firmware.

BUG=None
TEST=Built and booted into depthcharge on nyan.
BRANCH=None

Change-Id: I5b2fa460b6be6b212418de381e92de9b2fad70cb
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/173775
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
This commit is contained in:
Gabe Black 2013-10-20 22:15:33 -07:00 • committed by chrome-internal-fetch
commit bc2ba9c15c
1 changed files with 9 additions and 0 deletions
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9
src/soc/nvidia/tegra124/cpug.S
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@ -41,6 +41,15 @@ cpug_entry_point:
.global cpug_setup
.type cpug_setup, function
cpug_setup:
/*
* Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data
* aborts may happen early and crash before the abort handlers are
* installed, but at least the problem will show up near the code that
* causes it.
*/
msr cpsr_cxf, #0xdf
ldr sp, cpug_stack_pointer
eor lr, lr
ldr r0, cpug_entry_point