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mb/google/ocelot: Remove power limit override functionality

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This patch removes the power limit override code from google/ocelot until the power limits for WCL are known. It is left as a TODO till then.

Change-Id: I15bd1a1c8397957df96a97b4f9f3de0fd5f5c7f6
Signed-off-by: Avi Uday <aviuday@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87911
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Pranava Y N <pranavayn@google.com>
This commit is contained in:
Avi Uday 2025-06-02 12:31:00 +05:30 • committed by Matt DeVillier
commit bba9d27145
1 changed files with 2 additions and 49 deletions
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51
src/mainboard/google/ocelot/variants/baseboard/ocelot/ramstage.c
View file

@ -3,53 +3,6 @@
#include <baseboard/variants.h>
#include <ec/google/chromeec/ec.h>
/*
* SKU_ID, TDP (Watts), pl1_min (milliWatts), pl1_max (milliWatts),
* pl2_min (milliWatts), pl2_max (milliWatts), pl4 (milliWatts)
*/
const struct cpu_tdp_power_limits power_optimized_limits[] = {
{
.mch_id = PCI_DID_INTEL_PTL_H_ID_1,
.cpu_tdp = TDP_25W,
.power_limits_index = PTL_H_1_CORE,
.pl1_min_power = 10000,
.pl1_max_power = 25000,
.pl2_min_power = 50000,
.pl2_max_power = 50000,
.pl4_power = 65000
},
{
.mch_id = PCI_DID_INTEL_PTL_H_ID_2,
.cpu_tdp = TDP_25W,
.power_limits_index = PTL_H_1_CORE,
.pl1_min_power = 10000,
.pl1_max_power = 25000,
.pl2_min_power = 50000,
.pl2_max_power = 50000,
.pl4_power = 65000
},
{
.mch_id = PCI_DID_INTEL_PTL_H_ID_3,
.cpu_tdp = TDP_25W,
.power_limits_index = PTL_H_2_CORE,
.pl1_min_power = 10000,
.pl1_max_power = 25000,
.pl2_min_power = 50000,
.pl2_max_power = 50000,
.pl4_power = 65000
},
{
.mch_id = PCI_DID_INTEL_PTL_H_ID_4,
.cpu_tdp = TDP_25W,
.power_limits_index = PTL_H_2_CORE,
.pl1_min_power = 10000,
.pl1_max_power = 25000,
.pl2_min_power = 50000,
.pl2_max_power = 50000,
.pl4_power = 65000
},
};
/*
* Placeholder to check if variant has support for barrel jack for powering
* on the device.
@ -68,7 +21,7 @@ void baseboard_devtree_update(void)
if (variant_is_barrel_charger_present())
return;
/* TODO: Add power limit override code for Wildcat Lake */
if (!google_chromeec_is_battery_present())
variant_update_cpu_power_limits(power_optimized_limits,
ARRAY_SIZE(power_optimized_limits));
printk(BIOS_DEBUG, "TODO: Add support for power optimized boot configuration limits\n");
}