From bba9d271458103b65af63e6d4bd640f8cfb2dbe0 Mon Sep 17 00:00:00 2001 From: Avi Uday Date: Mon, 2 Jun 2025 12:31:00 +0530 Subject: [PATCH] mb/google/ocelot: Remove power limit override functionality This patch removes the power limit override code from google/ocelot until the power limits for WCL are known. It is left as a TODO till then. Change-Id: I15bd1a1c8397957df96a97b4f9f3de0fd5f5c7f6 Signed-off-by: Avi Uday Reviewed-on: https://review.coreboot.org/c/coreboot/+/87911 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Paul Menzel Reviewed-by: Pranava Y N --- .../variants/baseboard/ocelot/ramstage.c | 51 +------------------ 1 file changed, 2 insertions(+), 49 deletions(-) diff --git a/src/mainboard/google/ocelot/variants/baseboard/ocelot/ramstage.c b/src/mainboard/google/ocelot/variants/baseboard/ocelot/ramstage.c index 69d0d67cd0..43a82d12c3 100644 --- a/src/mainboard/google/ocelot/variants/baseboard/ocelot/ramstage.c +++ b/src/mainboard/google/ocelot/variants/baseboard/ocelot/ramstage.c @@ -3,53 +3,6 @@ #include #include -/* - * SKU_ID, TDP (Watts), pl1_min (milliWatts), pl1_max (milliWatts), - * pl2_min (milliWatts), pl2_max (milliWatts), pl4 (milliWatts) - */ -const struct cpu_tdp_power_limits power_optimized_limits[] = { - { - .mch_id = PCI_DID_INTEL_PTL_H_ID_1, - .cpu_tdp = TDP_25W, - .power_limits_index = PTL_H_1_CORE, - .pl1_min_power = 10000, - .pl1_max_power = 25000, - .pl2_min_power = 50000, - .pl2_max_power = 50000, - .pl4_power = 65000 - }, - { - .mch_id = PCI_DID_INTEL_PTL_H_ID_2, - .cpu_tdp = TDP_25W, - .power_limits_index = PTL_H_1_CORE, - .pl1_min_power = 10000, - .pl1_max_power = 25000, - .pl2_min_power = 50000, - .pl2_max_power = 50000, - .pl4_power = 65000 - }, - { - .mch_id = PCI_DID_INTEL_PTL_H_ID_3, - .cpu_tdp = TDP_25W, - .power_limits_index = PTL_H_2_CORE, - .pl1_min_power = 10000, - .pl1_max_power = 25000, - .pl2_min_power = 50000, - .pl2_max_power = 50000, - .pl4_power = 65000 - }, - { - .mch_id = PCI_DID_INTEL_PTL_H_ID_4, - .cpu_tdp = TDP_25W, - .power_limits_index = PTL_H_2_CORE, - .pl1_min_power = 10000, - .pl1_max_power = 25000, - .pl2_min_power = 50000, - .pl2_max_power = 50000, - .pl4_power = 65000 - }, -}; - /* * Placeholder to check if variant has support for barrel jack for powering * on the device. @@ -68,7 +21,7 @@ void baseboard_devtree_update(void) if (variant_is_barrel_charger_present()) return; + /* TODO: Add power limit override code for Wildcat Lake */ if (!google_chromeec_is_battery_present()) - variant_update_cpu_power_limits(power_optimized_limits, - ARRAY_SIZE(power_optimized_limits)); + printk(BIOS_DEBUG, "TODO: Add support for power optimized boot configuration limits\n"); }