erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

soc/intel/cmn/acpi: Add ACPI method to get LGMR address

Browse source 
This patch adds an ACPI method to get the LPC Generic Memory Range
(LGMR) address. This is necessary for platforms that need to access
the LGMR from OS driver.

The new method, called GLGM, reads the LGMR address from the LPC PCI
configuration space (offset 0x98) and returns it as a 32-bit value.

BUG=b:354066052
TEST=Able to build and boot google/brox.

Change-Id: I4322cee2c608e550e233c45c68958e8a4046c361
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85602
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2024-12-16 11:15:06 +05:30
commit bb85775d92
1 changed files with 16 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

16
src/soc/intel/common/block/acpi/acpi/lpc.asl
View file

@ -9,6 +9,22 @@ Device (LPCB)
Name (_ADR, 0x001f0000)
Name (_DDN, "LPC Bus Device")
OperationRegion (LPCP, PCI_Config, 0x00, 0x100)
Field (LPCP, DWordAcc, NoLock, Preserve)
{
Offset(0x98), /* LGMR */
LGEN, 1, /* Enable */
, 15,
LADR, 16, /* MADDR [31:16] */
}
/* Get LGMR */
Method (GLGM, 0, Serialized)
{
Local0 = LADR << 16
Return (Local0)
}
/* DMA Controller */
Device (DMAC)
{