soc/intel/common/block/graphics: Add missing TWL GT SKUs

IDs taken from ADL-N and TWL EDS Vol 1 Rev 2.5 doc #645548.

Change-Id: I53c41e17324cbb19c2150d986c538a11eb1140af
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86750
Reviewed-by: Michał Kopeć <michal.kopec@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Michał Żygowski 2025-03-06 12:48:02 +01:00 committed by Matt DeVillier
commit ba92b66454
3 changed files with 6 additions and 0 deletions

View file

@ -4276,6 +4276,8 @@
#define PCI_DID_INTEL_ADL_N_GT1 0x46D0
#define PCI_DID_INTEL_ADL_N_GT2 0x46D1
#define PCI_DID_INTEL_ADL_N_GT3 0x46D2
#define PCI_DID_INTEL_ADL_N_GT4 0x46D3
#define PCI_DID_INTEL_ADL_N_GT5 0x46D4
#define PCI_DID_INTEL_MTL_M_GT2 0x7d40
#define PCI_DID_INTEL_MTL_P_GT2_1 0x7d45
#define PCI_DID_INTEL_MTL_P_GT2_2 0x7d50

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@ -219,6 +219,8 @@ static struct {
{ PCI_DID_INTEL_ADL_N_GT1, "Alderlake N GT1" },
{ PCI_DID_INTEL_ADL_N_GT2, "Alderlake N GT2" },
{ PCI_DID_INTEL_ADL_N_GT3, "Alderlake N GT3" },
{ PCI_DID_INTEL_ADL_N_GT4, "Alderlake N GT4" },
{ PCI_DID_INTEL_ADL_N_GT5, "Alderlake N GT5" },
{ PCI_DID_INTEL_ADL_S_GT1, "Alderlake S GT1" },
{ PCI_DID_INTEL_ADL_S_GT1_1, "Alderlake S GT1" },
{ PCI_DID_INTEL_ADL_S_GT2, "Alderlake S GT2" },

View file

@ -459,6 +459,8 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_ADL_N_GT1,
PCI_DID_INTEL_ADL_N_GT2,
PCI_DID_INTEL_ADL_N_GT3,
PCI_DID_INTEL_ADL_N_GT4,
PCI_DID_INTEL_ADL_N_GT5,
PCI_DID_INTEL_RPL_S_GT0,
PCI_DID_INTEL_RPL_S_GT1_1,
PCI_DID_INTEL_RPL_S_GT1_2,