diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index d17dca4f34..7d695b21b7 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4276,6 +4276,8 @@
 #define PCI_DID_INTEL_ADL_N_GT1				0x46D0
 #define PCI_DID_INTEL_ADL_N_GT2				0x46D1
 #define PCI_DID_INTEL_ADL_N_GT3				0x46D2
+#define PCI_DID_INTEL_ADL_N_GT4				0x46D3
+#define PCI_DID_INTEL_ADL_N_GT5				0x46D4
 #define PCI_DID_INTEL_MTL_M_GT2				0x7d40
 #define PCI_DID_INTEL_MTL_P_GT2_1			0x7d45
 #define PCI_DID_INTEL_MTL_P_GT2_2			0x7d50
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index 57e4f522da..0c84d73644 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -219,6 +219,8 @@ static struct {
 	{ PCI_DID_INTEL_ADL_N_GT1, "Alderlake N GT1" },
 	{ PCI_DID_INTEL_ADL_N_GT2, "Alderlake N GT2" },
 	{ PCI_DID_INTEL_ADL_N_GT3, "Alderlake N GT3" },
+	{ PCI_DID_INTEL_ADL_N_GT4, "Alderlake N GT4" },
+	{ PCI_DID_INTEL_ADL_N_GT5, "Alderlake N GT5" },
 	{ PCI_DID_INTEL_ADL_S_GT1,   "Alderlake S GT1" },
 	{ PCI_DID_INTEL_ADL_S_GT1_1, "Alderlake S GT1" },
 	{ PCI_DID_INTEL_ADL_S_GT2,   "Alderlake S GT2" },
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index 144e8c30d6..cf3e7b1b23 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -459,6 +459,8 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DID_INTEL_ADL_N_GT1,
 	PCI_DID_INTEL_ADL_N_GT2,
 	PCI_DID_INTEL_ADL_N_GT3,
+	PCI_DID_INTEL_ADL_N_GT4,
+	PCI_DID_INTEL_ADL_N_GT5,
 	PCI_DID_INTEL_RPL_S_GT0,
 	PCI_DID_INTEL_RPL_S_GT1_1,
 	PCI_DID_INTEL_RPL_S_GT1_2,