tree: Use boolean for s0ix_enable

Change-Id: Id0ab5e641684e03da555a127808c0def5a53cbe6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84159
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/mainboard/intel/adlrvp/devicetree.cb

@@ -132,7 +132,7 @@ chip soc/intel/alderlake
 	# TCSS USB3
 	register "tcss_aux_ori" = "0"
 
-	register "s0ix_enable" = "1"
+	register "s0ix_enable" = "true"
 	register "dptf_enable" = "1"
 
 	register "serial_io_i2c_mode" = "{

src/mainboard/intel/adlrvp/devicetree_m.cb

@@ -95,7 +95,7 @@ chip soc/intel/alderlake
 	# TCSS USB3
 	register "tcss_aux_ori" = "0"
 
-	register "s0ix_enable" = "1"
+	register "s0ix_enable" = "true"
 
 	register "serial_io_i2c_mode" = "{
 		[PchSerialIoIndexI2C0] = PchSerialIoPci,

src/mainboard/intel/adlrvp/devicetree_n.cb

@@ -70,7 +70,7 @@ chip soc/intel/alderlake
 	register "tcss_aux_ori" = "4"
 	register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_E20, .pad_auxn_dc = GPP_E21}"
 
-	register "s0ix_enable" = "1"
+	register "s0ix_enable" = "true"
 
 	register "serial_io_i2c_mode" = "{
 		[PchSerialIoIndexI2C0] = PchSerialIoPci,

src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb

@@ -40,7 +40,7 @@ chip soc/intel/cannonlake
 	register "PcieClkSrcClkReq[5]" = "5"
 
 	# Disable S0ix
-	register "s0ix_enable" = "0"
+	register "s0ix_enable" = "false"
 
 	device domain 0 on
 		device pci 00.0 on  end # Host Bridge

src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb

@@ -38,7 +38,7 @@ chip soc/intel/cannonlake
 	register "sdcard_cd_gpio" = "GPP_G5"
 
 	# Enable S0ix
-	register "s0ix_enable" = "1"
+	register "s0ix_enable" = "true"
 
 	# Intel Common SoC Config
 	#+-------------------+---------------------------+

src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb

@@ -150,7 +150,7 @@ chip soc/intel/jasperlake
 	}"
 
 	# Enable S0ix
-	register "s0ix_enable" = "1"
+	register "s0ix_enable" = "true"
 
 	# GPIO for SD card detect
 	register "sdcard_cd_gpio" = "VGPIO_39"

src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb

@@ -50,7 +50,7 @@ chip soc/intel/meteorlake
 	register "cnvi_bt_core" = "true"
 
 	# Enable S0ix
-	register "s0ix_enable" = "1"
+	register "s0ix_enable" = "true"
 
 	# Disable C1 C-state auto-demotion
 	register "disable_c1_state_auto_demotion" = "1"

src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb

@@ -19,7 +19,7 @@ chip soc/intel/alderlake
 	register "sagv" = "SaGv_Enabled"
 
 	# S0ix enable
-	register "s0ix_enable" = "1"
+	register "s0ix_enable" = "true"
 
 	register "usb2_ports[0]" = "USB2_PORT_MID(OC1)"		# Type-A Port A0
 	register "usb2_ports[1]" = "USB2_PORT_MID(OC2)"		# Type-A Port A1

src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb

@@ -68,7 +68,7 @@ chip soc/intel/tigerlake
 	register "TcssAuxOri" = "0"
 
 	# Enable S0ix
-	register "s0ix_enable" = "1"
+	register "s0ix_enable" = "true"
 
 	# Enable DPTF
 	register "dptf_enable" = "1"

src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb

@@ -75,7 +75,7 @@ chip soc/intel/tigerlake
 	register "TcssAuxOri" = "0"
 
 	# Enable S0ix
-	register "s0ix_enable" = "1"
+	register "s0ix_enable" = "true"
 
 	# Enable DPTF
 	register "dptf_enable" = "1"