soc/intel/xeon_sp: Remove lpc_lockdown_config

If CHIPSET_LOCKDOWN_COREBOOT is selected, lpc_lockdown_config() will
be executed in common pch/lockdown firstly. Remove xeon_sp layer
lpc_lockdown_config() to avoid duplication.

The duplicated part are in src/soc/intel/common/pch/lockdown/lockdown.c:

static void platform_lockdown_config(void *unused)
{
	int chipset_lockdown;
	chipset_lockdown = get_lockdown_config();

	/* SPI lock down configuration */
	fast_spi_lockdown_cfg(chipset_lockdown);

	/* LPC/eSPI lock down configuration */
	lpc_lockdown_config(chipset_lockdown);

	...
}

Change-Id: Ibec389a6d55c7885def6896a0ea435514b75a323
Signed-off-by: Jincheng Li <jincheng.li@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85286
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
This commit is contained in:
Jincheng Li 2024-09-11 13:15:01 +08:00 committed by Lean Sheng Tan
commit afc49fa013

View file

@ -6,25 +6,11 @@
#include <soc/lockdown.h>
#include <soc/pm.h>
static void lpc_lockdown_config(void)
{
/* Set BIOS Interface Lock, BIOS Lock */
lpc_set_bios_interface_lock_down();
/* Only allow writes in SMM */
if (CONFIG(BOOTMEDIA_SMM_BWP)) {
lpc_set_eiss();
lpc_enable_wp();
}
lpc_set_lock_enable();
}
void soc_lockdown_config(int chipset_lockdown)
{
if (chipset_lockdown == CHIPSET_LOCKDOWN_FSP)
return;
lpc_lockdown_config();
pmc_lockdown_config();
sata_lockdown_config(chipset_lockdown);
spi_lockdown_config(chipset_lockdown);