soc/mediatek/common: Config CAL_TOL_RATE and CAL_MAX_VAL in SoC folder

MT8196 has differenet configurations from other platforms. Make
CAL_TOL_RATE and CAL_MAX_VAL as per SoC configuration in order to reuse
common/pmif_clk.c

BUG=none
TEST=emerge-corsola coreboot; emerge-geralt coreboot

Change-Id: Iefc8180e1719d9796df7457b619a8792ceb762b2
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84771
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Yidi Lin 2024-10-15 16:43:39 +08:00 committed by Yu-Ping Wu
commit af3f8298d6
6 changed files with 25 additions and 6 deletions

View file

@ -17,12 +17,6 @@ enum {
PMIF_WAIT_IDLE_US = 1000,
};
/* calibation tolerance rate, unit: 0.1% */
enum {
CAL_TOL_RATE = 40,
CAL_MAX_VAL = 0x7F,
};
u32 pmif_get_ulposc_freq_mhz(u32 cali_val);
int pmif_clk_init(void);
#endif /* __SOC_MEDIATEK_PMIF_SW_H__ */

View file

@ -2,6 +2,7 @@
#include <commonlib/helpers.h>
#include <console/console.h>
#include <soc/pmif.h>
#include <soc/pmif_clk_common.h>
#include <soc/pmif_sw.h>