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soc/intel/pantherlake: Enable FSP debug log level control using CBFS

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This allows controlling the FSP debug log level using CBFS RAW binary
files, providing more flexibility in debugging silicon firmware issues
with a debug AP FW binary.

The following CBFS files are used to determine the log levels:

- fsp_pcd_debug_level: For the overall FSP debug log level.
- fsp_mrc_debug_level: For the MRC (Memory Reference Code) debug log
  level.

This capability is particularly useful when debugging issues that
require examining both silicon and MRC logs simultaneously.

BUG=b:227151510
TEST=Able to control the FSP debug log based on CBFS options

To inject the fsp_pcd_debug_level and fsp_mrc_debug_level CBFS files
with the desired log level, run:

```
cbfstool image-fatcat.serial.bin add-int -i 5 -n option/fsp_pcd_debug_level

cbfstool image-fatcat.serial.bin add-int -i 5 -n option/fsp_mrc_debug_level
```

Change-Id: Ia2fc07188afde34d61ce8d50d3d722de48228e37
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86002
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Subrata Banik 2025-01-15 13:12:08 +00:00
commit ad3bc94dbd
2 changed files with 9 additions and 4 deletions
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3
src/soc/intel/pantherlake/fsp_params.c
View file

@ -3,6 +3,7 @@
#include <bootmode.h>
#include <cpu/intel/microcode.h>
#include <fsp/api.h>
#include <fsp/debug.h>
#include <fsp/fsp_debug_event.h>
#include <fsp/fsp_gop_blt.h>
#include <fsp/ppi/mp_service_ppi.h>
@ -685,7 +686,7 @@ static void arch_silicon_init_params(FSPS_ARCH2_UPD *s_arch_cfg)
/* Assign FspEventHandler arch Upd to use coreboot debug event handler */
if (CONFIG(FSP_USES_CB_DEBUG_EVENT_HANDLER)
&& CONFIG(CONSOLE_SERIAL)
&& CONFIG(FSP_ENABLE_SERIAL_DEBUG))
&& CONFIG(FSP_ENABLE_SERIAL_DEBUG) && fsp_get_pcd_debug_log_level())
s_arch_cfg->FspEventHandler = (uintptr_t)((FSP_EVENT_HANDLER *)
fsp_debug_event_handler);

10
src/soc/intel/pantherlake/romstage/fsp_params.c
View file

@ -2,6 +2,7 @@
#include <cpu/intel/common/common.h>
#include <cpu/x86/msr.h>
#include <fsp/debug.h>
#include <fsp/fsp_debug_event.h>
#include <fsp/util.h>
#include <intelblocks/cpulib.h>
@ -320,9 +321,12 @@ static void fsp_control_log_level(FSPM_UPD *mupd, bool is_enabled)
FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
FSPM_ARCHx_UPD *arch_upd = &mupd->FspmArchUpd;
enum fsp_log_level log_level = is_enabled ? fsp_map_console_log_level() :
FSP_LOG_LEVEL_DISABLE;
fsp_set_debug_level(m_cfg, log_level, log_level);
enum fsp_log_level fsp_log_level = is_enabled ? fsp_get_pcd_debug_log_level() :
FSP_LOG_LEVEL_DISABLE;
enum fsp_log_level mrc_log_level = is_enabled ? fsp_get_mrc_debug_log_level() :
FSP_LOG_LEVEL_DISABLE;
fsp_set_debug_level(m_cfg, fsp_log_level, mrc_log_level);
if ((m_cfg->PcdSerialDebugLevel > FSP_LOG_LEVEL_VERBOSE) ||
(m_cfg->SerialDebugMrcLevel > FSP_LOG_LEVEL_VERBOSE)) {