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soc/intel/pantherlake: Update CONSOLE_UART_BASE_ADDRESS Kconfig value

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The console UART base address for Panther Lake is being updated from
0xfe036000 to 0xfe02c000 (as per FSP version 3272). This correction
ensures the console initializes with the correct UART base address.

TEST=Able to get FSP debug log while building google/fatcat.

Change-Id: Ic123189fb5689318a4940edcfcf206c32e3ccf26
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89981
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Derek Huang <derekhuang@google.com>
This commit is contained in:
Subrata Banik 2025-11-10 13:15:26 +05:30
commit ace2e540d0
1 changed files with 1 additions and 1 deletions
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src/soc/intel/pantherlake/Kconfig
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@ -320,7 +320,7 @@ config SOC_INTEL_USB3_DEV_MAX
config CONSOLE_UART_BASE_ADDRESS
hex
default 0xfe036000
default 0xfe02c000
depends on INTEL_LPSS_UART_FOR_CONSOLE
# Clock divider parameters for 115200 baud rate