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Improve comments in Fam10h CAR.

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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@806 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Carl-Daniel Hailfinger 2008-08-22 19:42:45 +00:00
commit aad63ddd8a
1 changed files with 6 additions and 6 deletions
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12
arch/x86/amd/stage0.S
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@ -180,10 +180,10 @@ cache_as_ram_setup:
/* for GH, CAR need to set DRAM Base/Limit Registers to direct that to node0 */
/* Only BSP needed, for other nodes set during HT/memory init. */
/* So we need to check if it is BSP */
movl $0x1b, %ecx
/* So we need to check if it is BSP/BSC */
movl $0x1b, %ecx /* APIC Base Address Register */
rdmsr
bt $8, %eax /*BSC */
bt $8, %eax /* BSC Boot Strap CPU Core */
jnc CAR_FAM10_out
/* Enable RT tables on BSP */
@ -341,10 +341,10 @@ clear_fixed_var_mtrr_out:
#ifdef CONFIG_CPU_AMD_K10
/* So we need to check if it is BSP */
movl $0x1b, %ecx
/* So we need to check if it is BSP/BSC */
movl $0x1b, %ecx /* APIC BAR */
rdmsr
bt $8, %eax /*BSC */
bt $8, %eax /* BSC */
jnc CAR_FAM10_ap
#endif