From aa77ddb44aa4f400d0ed17b5c3eb929ca00d7419 Mon Sep 17 00:00:00 2001 From: Chen-Tsung Hsieh Date: Fri, 23 Jan 2026 08:42:23 +0000 Subject: [PATCH] soc/mediatek/common: Combine dsi_cmdq_size register writes Combine the size calculation and the CMDQ_SIZE_SEL bit setting into a single write32 call for dsi->dsi_cmdq_size to optimize register access. BUG=b:474187570 TEST=util/abuild/abuild -x -t GOOGLE_SKYWALKER -a --clean BRANCH=skywalker Change-Id: Idd08c8fab4120878c53fb94bf0e3cddb9a7eb513 Signed-off-by: Chen-Tsung Hsieh Reviewed-on: https://review.coreboot.org/c/coreboot/+/90874 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Yu-Ping Wu --- src/soc/mediatek/common/dsi_common.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/soc/mediatek/common/dsi_common.c b/src/soc/mediatek/common/dsi_common.c index b2df010a48..6f8d640845 100644 --- a/src/soc/mediatek/common/dsi_common.c +++ b/src/soc/mediatek/common/dsi_common.c @@ -421,8 +421,7 @@ static enum cb_err mtk_dsi_cmdq(enum mipi_dsi_transaction type, const u8 *data, } buffer_to_fifo32_prefix(tx_buf, prefix, prefsz, prefsz + len, &dsi->dsi_cmdq[0], 4, 4); - write32(&dsi->dsi_cmdq_size, DIV_ROUND_UP(prefsz + len, 4)); - setbits32(&dsi->dsi_cmdq_size, CMDQ_SIZE_SEL); + write32(&dsi->dsi_cmdq_size, DIV_ROUND_UP(prefsz + len, 4) | CMDQ_SIZE_SEL); } mtk_dsi_enable_and_start(is_dsi_dual_channel);