mb/starlabs/starbook/rpl: Reconfigure TBT GPIOs

It seems that FSP was fixing up the TBT0 TXD and RXD GPIOs;
add the missing GPIO configuration and group them.

Change-Id: I22af542fe008395a47c64396f481442ff3bcc9a7
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89584
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2025-10-14 20:50:32 +01:00
commit a8c70f7578

View file

@ -59,6 +59,11 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* SML Clock */
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* SML Data */
/* Retimer */
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF2), /* TBT0 TXD */
PAD_CFG_NF(GPP_E19, NONE, DEEP, NF2), /* TBT0 RXD */
PAD_CFG_GPO(GPP_E4, 0, DEEP), /* Force Power */
/* High-Definition Audio */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */
@ -179,8 +184,6 @@ const struct pad_config gpio_table[] = {
PAD_NC(GPP_E0, NONE),
PAD_NC(GPP_E1, NONE),
PAD_NC(GPP_E2, NONE),
/* E4: Retimer Force Power */
PAD_CFG_GPO(GPP_E4, 0, DEEP),
PAD_NC(GPP_E5, NONE),
PAD_NC(GPP_E7, NONE),
PAD_NC(GPP_E9, NONE),
@ -189,8 +192,6 @@ const struct pad_config gpio_table[] = {
PAD_NC(GPP_E15, NONE),
PAD_NC(GPP_E16, NONE),
PAD_NC(GPP_E17, NONE),
PAD_NC(GPP_E18, NONE),
PAD_NC(GPP_E19, NONE),
PAD_NC(GPP_E20, NONE),
PAD_NC(GPP_E21, NONE),
PAD_NC(GPP_E22, NONE),