From a8c70f7578189eef520a745b13651a21747fd92f Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Tue, 14 Oct 2025 20:50:32 +0100 Subject: [PATCH] mb/starlabs/starbook/rpl: Reconfigure TBT GPIOs It seems that FSP was fixing up the TBT0 TXD and RXD GPIOs; add the missing GPIO configuration and group them. Change-Id: I22af542fe008395a47c64396f481442ff3bcc9a7 Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/89584 Reviewed-by: Paul Menzel Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/mainboard/starlabs/starbook/variants/rpl/gpio.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/mainboard/starlabs/starbook/variants/rpl/gpio.c b/src/mainboard/starlabs/starbook/variants/rpl/gpio.c index f60e5e7caa..856a243baf 100644 --- a/src/mainboard/starlabs/starbook/variants/rpl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/rpl/gpio.c @@ -59,6 +59,11 @@ const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* SML Clock */ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* SML Data */ + /* Retimer */ + PAD_CFG_NF(GPP_E18, NONE, DEEP, NF2), /* TBT0 TXD */ + PAD_CFG_NF(GPP_E19, NONE, DEEP, NF2), /* TBT0 RXD */ + PAD_CFG_GPO(GPP_E4, 0, DEEP), /* Force Power */ + /* High-Definition Audio */ PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */ PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */ @@ -179,8 +184,6 @@ const struct pad_config gpio_table[] = { PAD_NC(GPP_E0, NONE), PAD_NC(GPP_E1, NONE), PAD_NC(GPP_E2, NONE), - /* E4: Retimer Force Power */ - PAD_CFG_GPO(GPP_E4, 0, DEEP), PAD_NC(GPP_E5, NONE), PAD_NC(GPP_E7, NONE), PAD_NC(GPP_E9, NONE), @@ -189,8 +192,6 @@ const struct pad_config gpio_table[] = { PAD_NC(GPP_E15, NONE), PAD_NC(GPP_E16, NONE), PAD_NC(GPP_E17, NONE), - PAD_NC(GPP_E18, NONE), - PAD_NC(GPP_E19, NONE), PAD_NC(GPP_E20, NONE), PAD_NC(GPP_E21, NONE), PAD_NC(GPP_E22, NONE),