mb/intel/ptlrvp: Add fw_config support for SPD selection

Add firmware configuration support for SPD (Serial Presence Detect)
selection on Intel PTLRVP boards. This change allows dynamic memory
configuration based on fw_config fields instead of relying solely on
board ID detection.

BUG=None
TEST=Build and verify SPD selection works correctly on PTLRVP boards
with different memory configurations.

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I3cc45ad9813bef09718fe679bfafb700024586f9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88255
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/intel/ptlrvp/variants/baseboard/ptlrvp/memory.c

@@ -2,6 +2,7 @@
 
 #include <baseboard/variants.h>
 #include <ec/intel/board_id.h>
+#include <fw_config.h>
 
 static const struct mb_cfg baseboard_memcfg = {
 	.type = MEM_TYPE_LP5X,
@@ -22,7 +23,12 @@ int __weak variant_memory_sku(void)
 
 	printk(BIOS_INFO, "Board ID is 0x%x\n", board_id);
 
-	spd_index = (board_id == GCS_32GB || board_id == GCS_64GB) ? 1 : 0;
+	if (board_id == GCS_32GB || board_id == GCS_64GB)
+		spd_index = 1;
+	else
+		spd_index = fw_config_get_field(FW_CONFIG_FIELD(SPD));
+
+	printk(BIOS_INFO, "SPD index: %zu\n", spd_index);
 
 	return spd_index;
 }

src/mainboard/intel/ptlrvp/variants/ptlrvp/overridetree.cb

@@ -67,6 +67,12 @@ fw_config
 		option ISH_DISABLE		0
 		option ISH_ENABLE		1
 	end
+	field SPD 25 26
+		option MEM_H58G56BK7BX068	0
+		option MEM_H58G66BK8BX067	1
+		option MEM_H58G56BK8BX068	2
+		option MEM_H58G66BK7BX067       3
+	end
 end
 
 chip soc/intel/pantherlake

src/mainboard/intel/ptlrvp/variants/ptlrvp_chromeec/overridetree.cb

@@ -67,6 +67,12 @@ fw_config
 		option ISH_DISABLE		0
 		option ISH_ENABLE		1
 	end
+	field SPD 25 26
+		option MEM_H58G56BK7BX068       0
+		option MEM_H58G66BK8BX067       1
+		option MEM_H58G56BK8BX068       2
+		option MEM_H58G66BK7BX067       3
+        end
 end
 
 chip soc/intel/pantherlake